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ADG799G Datasheet(PDF) 5 Page - Analog Devices |
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ADG799G Datasheet(HTML) 5 Page - Analog Devices |
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5 / 24 page  ADG799A/ADG799G Rev. 0 | Page 5 of 24 VDD = 3 V ± 10%, GND = 0 V, TA = −40°C to +85°C, unless otherwise noted. Table 2. Parameter Conditions Min Typ1 Max Unit ANALOG SWITCH Analog Signal Range2 VS = VDD, RL = 1 MΩ 0 2.2 V VS = VDD, RL = 75 Ω 0 1.7 V On Resistance, RON VD = 0 V, IDS = −10 mA, see Figure 22 3 5.5 Ω VD = 0 V to 1 V, IDS = −10 mA, see Figure 22 8 Ω On Resistance Matching Between Channels, ∆RON VD = 0 V, IDS = −10 mA 0.15 1.8 Ω VD = 1 V, IDS = −10 mA 2.1 Ω On Resistance Flatness, RFLAT(ON) VD = 0 V to 1 V, IDS = −10 mA 0.3 2.8 Ω LEAKAGE CURRENTS Source Off Leakage (IS(OFF)) VD = 2 V/1 V, VS = 1 V/2 V, see Figure 23 ±0.25 nA Drain Off Leakage (ID(OFF)) VD = 2 V/1 V, VS = 1 V/2 V, see Figure 23 ±0.25 nA Channel On Leakage (ID(ON), IS(ON)) VD = VS = 2 V/1 V, see Figure 24 ±0.25 nA DYNAMIC CHARACTERISTICS3 tON, tENABLE CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28 203 266 ns tOFF, tDISABLE CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28 200 260 ns Break-Before-Make Time Delay, tD CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V, see Figure 29 1 3 ns I2C to GPO Propagation Delay, tH, tL (ADG799G only) 121 ns Off Isolation f = 10 MHz, RL = 50 Ω, see Figure 26 −60 dB Channel-to-Channel Crosstalk f = 10 MHz, RL = 50 Ω, see Figure 27 Same Crosspoint Switch −50 dB Different Crosspoint Switch −80 dB −3 dB Bandwidth RL = 50 Ω, see Figure 15 210 MHz THD + N RL = 100 Ω 0.14 % Charge Injection CL = 1 nF, VS = 0 V, see Figure 30 2 pC CS(OFF) 13 pF CD(OFF) 17 pF CD(ON), CS(ON) 35 pF Power Supply Rejection Ratio, PSRR f = 20 kHz 70 dB Differential Gain Error CCIR330 test signal 0.66 % Differential Phase Error CCIR330 test signal 1 Degrees LOGIC INPUTS A0, A1, A2 Pins3 Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH VIN = 0 V to VDD +0.005 ±1 μA Input Capacitance, CIN 3 pF SCL, SDA Pins3 Input High Voltage, VINH 0.7 × VDD VDD + 0.3 V Input Low Voltage, VINL −0.3 +0.3 × VDD V Input Leakage Current, IIN VIN = 0 V to VDD 0.005 ±1 μA Input Hysteresis 0.05 × VDD V Input Capacitance, CIN 3 pF LOGIC OUTPUTS3 SDA Pin Output Low Voltage, VOL ISINK = 3 mA 0.4 V ISINK = 6 mA 0.6 V Floating State Leakage Current ±1 μA Floating State Output Capacitance 3 pF |
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