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AN1336 Datasheet(PDF) 6 Page - STMicroelectronics

Part # AN1336
Description  Power-fail comparator for NVRAM supervisory devices
PDF  10 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN1336 Datasheet(HTML) 6 Page - STMicroelectronics

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Advantages over traditional power monitoring
AN1336
3
Advantages over traditional power monitoring
Typical power monitoring (or supervisory) devices offer features such as brown-out detect
by monitoring the voltage at the VCC pin, then asserting a RESET output when VCC drops
below a minimum level. Some may also include chip-enable gating or chip-enable write
protection which will disable access to the memory, thereby protecting the SRAM contents
from errant writes by an MCU that is operating in an undervoltage condition. These are
good features and necessary to avoid catastrophic data loss, but unfortunately do not occur
early enough to allow the MCU to gracefully enter a fail-safe state. Any of the following
scenarios will result in unsatisfactory system shutdown:
Loss of processor state
When the RESET occurs, any information not already stored to the NVRAM will be lost.
This includes the processor state, the program status, and any information still in the
scratch pad RAM, but not in the NVRAM.
RESET occurs during a write cycle
If the MCU is writing to memory when RESET occurs, that data will most likely be
corrupted. This applies to EEPROM and Flash memories as well as NVRAM.
Write protect occurs before RESET
If the NVRAM gates off access to the SRAM prior to processor RESET, the processor may
continue accessing/writing the NVRAM expecting that the data written is secure (when it
has in fact, been lost).
6/10
DocID007594 Rev 2



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