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AN2782 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN2782 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 39 page ![]() The circuit implementing the line-modulated fixed off-time with the new L6562A AN2782 6/39 Doc ID 14763 Rev 2 3 The circuit implementing the line-modulated fixed off-time with the new L6562A The circuit that implements LM-FOT control with the L6562A is shown in Figure 6. During the ON-time of the MOSFET the gate voltage VGD = 15 V is high, the diode D is forward- biased and the voltage at the ZCD pin is internally clamped at VZCDclamp ≈ 5.7 V. During the off-time of M VGD = 10 V is low, the diode D is reverse-biased and the voltage at the pin decays with an exponential law until it reaches the triggering threshold (VZCDtrigger ≈ 0.7 V) that causes the switch to turn on. The time needed for the ZCD voltage to go from VZCDclamp to VZCDtrigger defines the duration of the off-time TOFF. Figure 6. Circuit implementing FOT control with the L6562A The circuit of Figure 6 makes TOFF a function of the RMS line voltage thanks to the peak- holding effect of T1 (which acts as a buffer) along with R and C whose time constant is significantly longer than a line half-cycle. With the addition of R0 and T, as long as the voltage on the ZCD pin during TOFF is above Vmult+VBE, C is discharged through R and R0, following the law: As V’ZCD(t) falls below Vmult+VBE, T1 is cut off and C is discharged through R only, so that its evolution from that point on is described by: V'ZCD(t) decreases from VZCDclamp = 5.7 V to Vmult+VBE in the following time period t': (1) (2) (3) () () () BE mult 0 C RR ) R R ( t BE mult 0 ZCDclamp ZCD V V R R R e V V R R R V ) t ( V 0 0 + ⋅ + + ⋅ ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + ⋅ + − = ′ ⋅ + ⋅ − () C R t BE mult 0 ZCD e V V R R R ) t ( V ⋅ − ⋅ + ⋅ + = ′′ ( ) () ⎥⎥⎦ ⎤ ⎢ ⎢ ⎣ ⎡ ⋅ + − + ⋅ ⋅ + ⋅ ⋅ + ⋅ − = ′ R V V ) R R ( V R V V ln C R R R R t BE mult 0 ZCDclamp 0 BE mult 0 0 |
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