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AN2782 Datasheet(PDF) 8 Page - STMicroelectronics |
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AN2782 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 39 page ![]() The circuit implementing the line-modulated fixed off-time with the new L6562A AN2782 8/39 Doc ID 14763 Rev 2 characteristics. Consequently, all of the properties of the standard FOT control are maintained. Due to the highly non-linear nature of the TOFF modulation introduced by T1 and R0, its effects are discussed only qualitatively and the quantitative aspects are provided graphically for a specific case in [7]. As a practical rule, it is convenient to first select a capacitor and then to calculate the resistor needed to achieve the desired TOFF (see Section 4.3.7). As the gate voltage VGD goes high, the resistor Rs charges the timing capacitor C as quickly as possible up to VZCDclamp, without exceeding clamp rating (IZCDx =10 mA). Then it must fulfill the following inequalities: where VGD (assume VGD = 10 V) is the voltage delivered by the gate driver, VGDx = 15 V its maximum value, and VF the forward drop on D. When working at high line/light load the on-time of the power switch becomes very short and the resistor Rs alone is no longer able to charge C up to VZCDclamp. The speed-up capacitor Cs is then used in parallel to Rs. This capacitor causes an almost instantaneous charge of C up to a level, after that Rs completes the charge up to VZCDclamp. It is important that the steep edge caused by Cs does not reach the clamp level, otherwise the internal clamp of the L6562A undergoes uncontrolled current spikes (limited only by the dynamic resistance of the 1N4148 and the ESR of Cs) that could overstress the IC. Cs must then be: (6) (7) ZCDclamp F ZCDclamp GD ZCDclamp ZCDx F ZCDclamp GDx V V V V R Rs R V I V V V − − ⋅ < < + − − F ZCDclamp GDx ZCDclamp V V V V C Cs − − < |
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