AN2960 datasheet(10/41 Pages) STMICROELECTRONICS

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Digital interfaces

AN2960

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Doc ID 15557 Rev 1

Digital interfaces

The registers embedded in the LIS331DL may be accessed through I2C and SPI serial

interfaces. The latter may be SW configured to operate in either 3-wire or 4-wire interface

mode.

The serial interfaces are mapped onto the same pads. To select/exploit the I2C interface, the

CS line must be tied high (i.e. connected to Vdd_IO).

4.1

I2C bus interface

The LIS331DL I2C is a bus slave. The I2C is employed to write/read the data to/from the

registers.

Relevant I2C terminology is provided in Table 3:

There are two signals associated with the I2C bus: the serial clock line (SCL) and the serial

data line (SDA). The latter is a bidirectional line used for sending and receiving data to/from

the interface. Both lines are connected to Vdd_IO through a pull-up resistor embedded in

the LIS331DL. When the bus is free, both the lines are high.

The I2C interface is compliant with fast mode (400 kHz) I2C standards as well as normal

mode.

Table 2.

Serial interface pin description

Pin Name

Pin description

SPI chip select (CS)

I2C/SPI selector (1: I2C mode; 0: SPI enabled)

SCL/SPC

SPI CK line (SCL)

I2C clock line (SPC)

SDI/SDA/SDO

I2C serial data (SDA)

SPI data in (SDI)

SPI data out (SDO) -for 3-wire SPI mode

SDO

I2C less significant bit of device address

SPI data out (SDO) - for 4-wire SPI mode

Table 3.

Terminology

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates

a transfer

Slave

The device addressed by the master

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