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AN4130 Datasheet(PDF) 10 Page - STMicroelectronics |
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AN4130 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 41 page ![]() Theory of operation AN4130 10/41 Doc ID 023315 Rev 1 Figure 9. Waveforms with 130 V input Where: ● Yellow = line voltage ● Magenta = line current, 50 mA/div ref -3div ● Blue = voltage at ILED pin, ref -3 div ● Green = LED current, 50 mA/div ref -3div. Power factor is excellent over the designed line voltage range of 90 V to 132 V, well above 0.98. Total harmonic distortion reaches a minimum at one line voltage. Over the range, THD is less than 20%. 2.6 Diode clamp to limit input current Since the peak FET current is directly controlled by the voltage on the ILED pin, a diode clamp can be added to limit the voltage increase to reasonable levels. The graph below shows the results for two conditions - no diode, and a Schottky diode having about 0.3 V forward drop, placed across the DC filter capacitor. The HVLED815 attempts to provide regulated power even if low line voltage makes that task difficult. It raises the voltage on the ILED pin to fairly high levels if the line voltage is reduced. Losses in the unit rise dramatically with decreasing line voltage as the input current increases. |
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