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PD46185092B Datasheet(PDF) 11 Page - Renesas Technology Corp

Part # PD46185092B
Description  18M-BIT QDRTM II SRAM 2-WORD BURST OPERATION
PDF  36 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

PD46185092B Datasheet(HTML) 11 Page - Renesas Technology Corp

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μPD46185092B, μPD46185182B, μPD46185362B
R10DS0112EJ0200 Rev.2.00
Page 11 of 35
Nov 09, 2012
Byte Write Operation
[
μPD46185092B]
Operation
K
K#
BW0#
Write D0 to D8
L
→ H
−
0
−
L
→ H
0
Write nothing
L
→ H
−
1
−
L
→ H
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# can be altered for any portion of the BURST WRITE
operation provided that the setup and hold requirements are satisfied.
[
μPD46185182B]
Operation
K
K#
BW0#
BW1#
Write D0 to D17
L
→ H
−
0
0
−
L
→ H
0
0
Write D0 to D8
L
→ H
−
0
1
−
L
→ H
0
1
Write D9 to D17
L
→ H
−
1
0
−
L
→ H
1
0
Write nothing
L
→ H
−
1
1
−
L
→ H
1
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# and BW1# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
[
μPD46185362B]
Operation
K
K#
BW0#
BW1#
BW2#
BW3#
Write D0 to D35
L
→ H
−
0
0
0
0
−
L
→ H
0
0
0
0
Write D0 to D8
L
→ H
−
0
1
1
1
−
L
→ H
0
1
1
1
Write D9 to D17
L
→ H
−
1
0
1
1
−
L
→ H
1
0
1
1
Write D18 to D26
L
→ H
−
1
1
0
1
−
L
→ H
1
1
0
1
Write D27 to D35
L
→ H
−
1
1
1
0
−
L
→ H
1
1
1
0
Write nothing
L
→ H
−
1
1
1
1
−
L
→ H
1
1
1
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# to BW3# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.



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