AN2606 datasheet(53/155 Pages) STMICROELECTRONICS

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AN2606

STM32F40xxx/41xxx devices bootloader

154

11.2

Bootloader V9.x

11.2.1

Bootloader configuration

The STM32F40xxx/41xxx bootloader is activated by applying pattern1 (described in Table 2:

Bootloader activation patterns). The following table shows the hardware resources used by

this bootloader.

Table 24. STM32F40xxx/41xxx configuration in System memory boot mode

Bootloader

Feature/Peripheral

State

Comment

Common to all

bootloaders

RCC

HSI enabled

The system clock frequency is 60 MHz

using the PLL.

The HSI clock source is used at startup

(interface detection phase) and when

USART or SPI or I2C interfaces are

selected (once CAN or DFU bootloader is

selected, the clock source will be derived

from the external crystal).

HSE enabled

The system clock frequency is 60 MHz.

The HSE clock source is used only when

the CAN or the DFU (USB FS Device)

interfaces are selected.

The external clock must provide a

frequency multiple of 1 MHz and ranging

from 4 MHz to 26 MHz.

The Clock Security System (CSS) interrupt

is enabled for the CAN and DFU

bootloaders. Any failure (or removal) of the

external clock generates system reset.

RAM

12 Kbytes starting from address

0x20000000 are used by the bootloader

firmware

System memory

30424 bytes starting from address

0x1FFF0000, contain the bootloader

firmware

IWDG

The independent watchdog (IWDG)

prescaler is configured to its maximum

value. It is periodically refreshed to prevent

watchdog reset (in case the hardware

IWDG option was previously enabled by the

user).

Power

Voltage range is set to [1.62 V, 2.1 V]. In

this range internal Flash write operations

are allowed only in byte format (Half-Word,

Word and Double-Word operations are not

allowed). The voltage range can be

configured in run time using bootloader

commands.

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