AN2606 datasheet(69/155 Pages) STMICROELECTRONICS

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AN2606

STM32F378xx devices bootloader

154

STM32F378xx devices bootloader

16.1

Bootloader configuration

The STM32F378xx bootloader is activated by applying pattern2 (described in Table 2:

Bootloader activation patterns). The following table shows the hardware resources used by

this bootloader.

Table 34. STM32F378xx configuration in System memory boot mode

Bootloader

Feature/Peripheral

State

Comment

Common to all

bootloaders

RCC

HSI enabled

The system clock frequency is 8 MHz using

the HSI.

IWDG

The independent watchdog (IWDG)

prescaler is configured to its maximum

value and is periodically refreshed to

prevent watchdog reset (in case the

hardware IWDG option was previously

enabled by the user). Window feature is

disabled.

System memory

8 Kbytes starting from address

0x1FFFD800. This area contains the

bootloader firmware

RAM

4 Kbytes starting from address 0x20000000

are used by the bootloader firmware.

USART1

bootloader

USART1

Enabled

Once initialized, the USART1 configuration

is: 8 bits, even parity and 1 Stop bit

USART1_RX pin

Input

PA10 pin: USART1 in reception mode.

USART1_TX pin

Output

PA9 pin: USART1 in transmission mode.

USART2

bootloader

USART2

Enabled

Once initialized, the USART2 configuration

is: 8 bits, even parity and 1 Stop bit. The

USART2 uses its remapped pins.

USART2_RX pin

Input

PD6 pin: USART2 in reception mode.

USART2_TX pin

Output

PD5 pin: USART2 in transmission mode.

USART1 and

USART2

bootloaders

SysTick timer

Enabled

Used to automatically detect the serial baud

rate from the host for USARTx bootloader.

I2C1

bootloader

I2C1

Enabled

The I2C1 configuration is:

I2C speed: up to 400 KHz, 7-bit address,

slave mode, analog filter ON. Slave 7-bit

address: 0b0110111x (where x = 0 for write

and x = 1 for read).

I2C1_SCL pin

Input/ Output

PB6 pin: clock line is used in open-drain

mode.

I2C1_SDA pin

Input/ Output

PB7 pin: data line is used in open-drain

mode.

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