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AN2606 Datasheet(PDF) 33 Page - STMicroelectronics |
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AN2606 Datasheet(HTML) 33 Page - STMicroelectronics |
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33 / 155 page ![]() DocID13801 Rev 21 33/155 AN2606 STM32L1xxx6(8/B) devices bootloader 154 7 STM32L1xxx6(8/B) devices bootloader 7.1 Bootloader configuration The STM32L1xxx6(8/B) bootloader is activated by applying pattern1 (described in Table 2: Bootloader activation patterns). The following table shows the hardware resources used by this bootloader. The system clock is derived from the embedded internal high-speed RC, no external quartz is required for the bootloader execution. Table 12. STM32L1xxx6(8/B) configuration in System memory boot mode Bootloader Feature/Peripheral State Comment Common to all bootloaders RCC HSI enabled The system clock frequency is 16 MHz. RAM - 2 Kbytes starting from address 0x20000000 are used by the bootloader firmware. System memory - 4 Kbytes starting from address 0x1FF00000 contain the bootloader firmware. IWDG - The independent watchdog (IWDG) prescaler is configured to its maximum value and is periodically refreshed to prevent watchdog reset (in case the hardware IWDG option was previously enabled by the user). Power - Voltage range is set to Voltage Range 1. USART1 bootloader USART1 Enabled Once initialized, the USART1 configuration is: 8 bits, even parity and 1 Stop bit. USART1_RX pin Input PA10 pin: USART1 in reception mode USART1_TX pin Output PA9 pin: USART1 in transmission mode USART2 bootloader USART2 Enabled Once initialized, the USART2 configuration is: 8 bits, even parity and 1 Stop bit. USART2_RX pin Input PD6 pin: USART2 in reception mode USART2_TX pin Output PD5 pin: USART2 in transmission mode USART1 and USART2 bootloaders SysTick timer Enabled Used to automatically detect the serial baud rate from the host. |
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