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AN2606 Datasheet(PDF) 124 Page - STMicroelectronics |
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AN2606 Datasheet(HTML) 124 Page - STMicroelectronics |
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124 / 155 page  STM32L05xxx/06xxx devices bootloader AN2606 124/155 DocID13801 Rev 21 29 STM32L05xxx/06xxx devices bootloader 29.1 Bootloader configuration The STM32L05xxx/06xxx bootloader is activated by applying pattern1 (described in Table 2: Bootloader activation patterns). The following table shows the hardware resources used by this bootloader. Table 62. STM32L05xxx/06xxx configuration in System memory boot mode Bootloader Feature/Peripheral State Comment Common to all bootloaders RCC HSI enabled The system clock frequency is 32 MHz with HSI 16 MHz as clock source. Power - Voltage range is set to Voltage Range 1. RAM - 4 Kbytes starting from address 0x20000000 are used by the bootloader firmware System memory - 4 Kbytes starting from address 0x1FF00000, contain the bootloader firmware IWDG - The independent watchdog (IWDG) prescaler is configured to its maximum value. It is periodically refreshed to prevent watchdog reset (in case the hardware IWDG option was previously enabled by the user). USART1 bootloader USART1 Enabled Once initialized the USART1 configuration is: 8-bits, even parity and 1 Stop bit USART1_RX pin Input PA10 pin: USART1 in reception mode USART1_TX pin Output PA9 pin: USART1 in transmission mode USART2 bootloader USART2 Enabled Once initialized the USART2 configuration is: 8-bits, even parity and 1 Stop bit USART2_RX pin Input PA3 pin: USART2 in reception mode USART2_TX pin Output PA2 pin: USART2 in transmission mode USART1 and USART2 bootloaders SysTick timer Enabled Used to automatically detect the serial baud rate from the host for USARTx bootloaders. |
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