AN3240 datasheet(19/32 Pages) STMICROELECTRONICS

19 / 32 page

AN3240

Demonstration kit composition

Doc ID 17689 Rev 1

19/32

Figure 9.

Demonstration kit system image

6.1.1

How to drive the STHV748 for method 1

The user simply needs a clock generator (or an AVG) in a way to drive pins IN1 and IN2 with

a proper time pulse width, consequently, it is possible to fix a truth table state for XDCR

using the 2 switches on the PCB adapter connected to VDD supply or GND, which control

IN3 and IN4. See the example diagram below (Figure 10):

Figure 10.

Inputs set of generators for PW mode (4 cycles - TX0 pulser Chx)

Note:

The DC generators, shown in Figure 10, are symbolic, in the truth table the VDD voltage is

selected by the user through the J9 jumper on the PCB demo, which supplies the switches

on the PCB adapter.

In Figure 10, an example of a TX0 pulser in PW mode setting, is described. It is possible to

pass easily to a TX1 pulser PW mode in the same example shown in Figure 10, in fact, it is

enough to change the IN3 status, through the switch on the PCB adapter, from 0 to VDD

(IN4=0 - not touched). This simple commutation on switch IN3 allows 4 cycles for the TX1

pulser.

AN3240 Datasheet(PDF) 19 Page - STMicroelectronics