Programming STM8 Flash microcontrollers

PM0054

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Doc ID 15433 Rev 9

The programming can also be performed directly through the SWIM interface. In this case, it

is recommended to stall the device in order to prevent the core from accessing the Flash

program memory during the block program or erase operation. This can be done by setting

the STALL bit in the DM_CSR2 debug module register. Refer to the STM8 SWIM

communication protocol and debug module (UM0470) for more information.

Caution:

During a block program or erase operation, it is recommended to avoid executing

instructions performing a read access to program memory.

Caution:

If the number of written memory locations is higher than that required in the block

program/erase sequence, the additional locations are handled as redundant byte write

operations.

If the number of written memory locations is lower than that specified in the block

program/erase sequence, the block program/erase process does not start and the CPU

stalls waiting for the remaining operations to be performed.

Caution:

EOP and WR_PG_DIS bits of FLASH_IAPSR register are automatically cleared when a

program/erase operation starts.

Caution:

If a block program or erase sequence is interrupted by a reset, the data programmed in the

memory may be corrupted.

Standard block programming

The following sequence is required to perform a standard block program sequence (block

erased and programmed):

1.

Unlock the memory if not already done.

The UBC option byte can be read to check if the block to program is not in the UBC

area. If necessary, reprogram it to allow erasing and programming the targeted block.

2.

Write 0x01 in FLASH_CR2 (PRG bit active).

3.

Write all the data bytes of the block you want to program starting with the very first

address of the block. No read or write access to the program memory is allowed during

these load operations as they might corrupt the values to be programmed.

The programming cycle starts automatically when all the data in the block have been

written.

4.

Check the WR_PG_DIS bit in FLASH_IAPSR to verify if the block you attempted to

program was not write-protected (optional)

5.

To check if the program operation is complete, poll the EOP bit in FLASH_IAPSR from

program memory. EOP is set to ‘1’ when the standard block program operation has

completed. To avoid polling the EOP bit, an interrupt can be generated when EOP is

set.

Note:

It is mandatory to execute steps 2 to 4 from RAM.

Caution:

EOP and WR_PG_DIS bits are cleared by reading the FLASH_IAPSR register. It is

consequently strongly recommended to perform one single read operation to the

FLASH_IAPSR register to check the values of these bits.