UPD705102 datasheet(7/80 Pages) NEC

7 / 80 page

µPD705102

Data Sheet U13675EJ2V1DS00

1.2 Non-Port Pins

(1/2)

Pin Name

I/O

Function

Alternate Function

D0 to D31

3-state I/O

Data bus

—

A1 to A23

3-state output

Address bus

—

READY

Input

End of bus cycle enable

—

HLDRQ

Input

Bus hold request

—

HLDAK

Output

Bus hold enable

—

MRD

3-state output

Memory read strobe

—

UUBEN

Byte enable output (most significant byte: D31 to D24)

—

ULBEN

Byte enable output (enables second byte: D23 to D16)

—

LUBEN

Byte enable output (enables third byte: D15 to D8)

—

LLBEN

Byte enable output (enables least significant byte: D7 to D0)

—

IORD

I/O read strobe

—

IOWR

I/O write strobe

—

MWR

Memory write strobe

—

BT16B

Input

CS7 space bus size setting

—

BCYST

3-state output

Bus cycle start output

—

R/W

R/W output

—

RESET

Input

Reset input

—

Crystal resonator connection (open when external clock input)

—

Schmitt input

Crystal resonator connection/external clock input

—

CLKOUT

Output

Bus clock output

—

CMODE

Input

PLL multiplication factor setting (

×6, ×8)

—

CS2, CS7

3-state output

Memory chip select output

—

CS3 to CS6

Memory I/O chip select output

—

STOPAK

Output

STOP mode report output

INTP10

Input

Maskable interrupts

TO10

INTP11

PORTB5

INTP12

TO11

INTP13

PORTB3

INTP00

PORTB2

INTP01

PORTB4

INTP02

PORTB6

INTP03

PORTB7

NMI

Non-maskable interrupt

—

RAS

3-state output

SDRAM RAS strobe

—

UUDQM

DQ mask enable (most significant byte: D31 to D24)

—

ULDQM

DQ mask enable (second byte: D23 to D16)

—

LUDQM

DQ mask enable (third byte: D15 to D8)

—

LLDQM

DQ mask enable (least significant byte: D7 to D0)

—

UPD705102 Datasheet(PDF) 7 Page - NEC

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