AN4206 datasheet(25/34 Pages) STMICROELECTRONICS

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AN4206

Recommendations

Figure 12. Typical layout for VDD/VSS pair

5.5

Other signals

When designing an application, the EMC performance can be improved by closely studying:



Signals for which a temporary disturbance affects the running process permanently

(such as interrupts and handshaking strobe signals, but not LED commands). For

these signals, a surrounding ground trace, shorter lengths and the absence of noisy

and sensitive traces nearby (crosstalk effect) improve EMC performance.



Digital signals: the best possible electrical margin must be reached for the two logical

states and slow Schmitt triggers are recommended to eliminate parasitic states.



Noisy signals (clock, etc.)



Sensitive signals (high impedance, etc.)

5.6

Unused I/Os and features

All microcontrollers are designed for a variety of applications and often a particular

application does not use 100% of the MCU resources.

To increase EMC performance and avoid extra power consumption, unused clocks,

counters or I/Os, should not be left free. I/Os should be connected to a fixed logic level of 0

or 1 by an external or internal pull-up or pull-down on the unused I/O pin. The other option is

to configure GPIO as output mode using software. Unused features should be frozen or

disabled, which is their default value.

AN4206 Datasheet(PDF) 25 Page - STMicroelectronics