AN4467 datasheet(24/33 Pages) STMICROELECTRONICS

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Debug management

AN4467

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DocID026156 Rev 2

Debug management

4.1

Introduction

The host/target interface is the hardware equipment that connects the host to the application

board. This interface is made of three components: a hardware debug tool, a SW connector

and a cable connecting the host to the debug tool.

Figure 12 shows the connection of the host to a development board.

The Nucleo demonstration board embeds the debug tools (ST-LINK) so it can be directly

connected to the PC through an USB cable.

Figure 12. Host-to-board connection

4.2

SWD debug port (serial wire)

The STM32L0xx core integrates the serial wire debug port (SW-DP). It is an ARM® standard

CoreSight™ debug port with a 2-pin (clock + data) interface to the debug access port.

4.3

Pinout and debug port pins

The STM32L0xx MCUs are offered in various packages with varying numbers of pins.

4.4

Serial wire debug (SWD) pin assignment

The same SWD pin assignment is available on all STM32L0xx packages.

Table 4. SWD port pins

SWD pin name

SWD port

Pin assignment

Type

Debug assignment

SWDIO

I/O

Serial wire data input/output

PA13

SWCLK

Serial wire clock

PA14

AN4467 Datasheet(PDF) 24 Page - STMicroelectronics