AN4467 datasheet(27/33 Pages) STMICROELECTRONICS

27 / 33 page

DocID026156 Rev 2

27/33

AN4467

Recommendations

Figure 14. Typical layout for VDD / VSS pair

5.5

Other signals

When designing an application, the EMC performance can be improved by closely studying

the following:

•

Signals for which a temporary disturbance affects the running process permanently

(which is the case for interrupts and handshaking strobe signals but, not the case for

LED commands).

For these signals, a surrounding ground trace, shorter lengths, and the absence of

noisy and sensitive traces nearby (crosstalk effect) improve EMC performance.

For digital signals, the best possible electrical margin must be reached for the two

logical states and slow Schmitt triggers are recommended to eliminate parasitic states.

•

Noisy signals (example, clock)

•

Sensitive signals (example, high impedance)

5.6

Unused I/Os and features

All microcontrollers are designed for a variety of applications and often a particular

application does not use 100% of the MCU resources.

To increase EMC performance and avoid extra power consumption, unused clocks,

counters or I/Os, should not be left free. I/Os should be connected to a fixed logic level of 0

or 1 by an external or internal pull-up or pull-down on the unused I/O pin. The other option is

to configure GPIO as output mode using software. Unused features should be frozen or

disabled, which is their default value.

AN4467 Datasheet(PDF) 27 Page - STMicroelectronics