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PCM1865DBT Datasheet(PDF) 43 Page - Texas Instruments

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Part # PCM1865DBT
Description  PCM186x 110dB 2ch and 4ch Audio ADCs with Universal Front End
PDF  115 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCM1865DBT Datasheet(HTML) 43 Page - Texas Instruments

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A6
A5
A4
A3
A2
A1
A0
W
D6
D5
D4
D3
D2
D1
D0
D7
MS
MC
MOSI
MISO
HI-z
IDX6
IDX5 IDX4
IDX3 IDX2
IDX1 IDX0
D7
D6
D5
D4
D3
D2
D1
D0
Register Index (or Address)
Register Data
MSB
LSB
R/W
PCM1861, PCM1863, PCM1865
www.ti.com
SLAS831C – MARCH 2014 – REVISED AUGUST 2014
Table 18. MD1 - I2C Address or SPI Chip Select
Mode
MD1 Usage
Static MD1 Value
Configuration
I2C
Address pin
Low
I2C Address: 0x94
I2C
Address pin
High
I2C Address: 0x96
SPI
MS (SPI Chip Select)
N/A
N/A
8.19.3 SPI Interface
The SPI interface is a 4-wire synchronous serial port which operates asynchronously to the serial audio interface
and the system clock (SCK). The serial control interface is used to program and read the on-chip mode registers.
The control interface includes MISO, MOSI , MC, and MS. MISO (Master In Slave Out) is the serial data output,
used to read back the values of the mode registers; MOSI (Master Out Slave In) is the serial data input, used to
program the mode registers.
MC is the serial bit clock, used to shift data in and out of the control port on the MC falling edge. MS is the
active-low mode control enable, used to enable the internal mode register access. If data from the device is not
required, the MISO pin can be assigned to GPIO1 by register control.
8.19.3.1 Register Read/Write Operation
All read/write operations for the serial control port use 16-bit data words. Figure 39 shows the control data word
format. The most significant bit is the read/write (R/W) bit. For write operations, the bit must be set to 0. For read
operations, the bit must be set to 1. There are seven bits, labeled IDX[6:0], that hold the register index (or
address) for the read and write operations. The least significant eight bits, D[7:0], contain the data to be written
to, or the data that was read from, the register specified by IDX[6:0].
Figure 40 and Figure 41 show the functional timing diagram for writing or reading through the serial control port.
MS should be held at logic 1 state until a register needs to be written or read. To start the register write or read
cycle, MS should be set to logic 0. Sixteen clocks are then provided on MC, corresponding to the 16 bits of the
control data word on MOSI and readback data on MISO. After the eighth clock cycle has completed, the data
from the indexed-mode control register appears on MISO during the read operation. After the sixteenth clock
cycle has completed, the data is latched into the indexed-mode control register during the write operation. To
write or read subsequent data, MS should be set to logic 1 once.
NOTE: B8 is used for selection of “Write” or “Read”. Setting = 0 indicates a “Write”, while = 1 indicates a ”Read”. Bits 15–9
are used for register address. Bits 7–0 are used for register data.
Figure 39. Control Data Word Format for MDI
Figure 40. Serial Control Format for Write
Copyright © 2014, Texas Instruments Incorporated
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Product Folder Links: PCM1861 PCM1863 PCM1865



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