PIC16F870SLASHP datasheet(93/156 Pages) MICROCHIP

93 / 156 page

Preliminary

DS30569A-page 93

PIC16F870/871

11.3

Reset

The PIC16F870/871 differentiates between various

kinds of reset:

• Power-on Reset (POR)

•MCLR reset during normal operation

•MCLR reset during SLEEP

• WDT Reset (during normal operation)

• WDT Wake-up (during SLEEP)

• Brown-out Reset (BOR)

Some registers are not affected in any reset condition.

Their status is unknown on POR and unchanged in any

other reset. Most other registers are reset to a “reset

state” on Power-on Reset (POR), on the MCLR and

WDT Reset, on MCLR reset during SLEEP, and Brown-

out Reset (BOR). They are not affected by a WDT

Wake-up, which is viewed as the resumption of normal

operation. The TO and PD bits are set or cleared differ-

ently in different reset situations as indicated in

Table 11-4. These bits are used in software to deter-

mine the nature of the reset. See Table 11-6 for a full

description of reset states of all registers.

A simplified block diagram of the on-chip reset circuit is

shown in Figure 11-4.

These devices have a MCLR noise filter in the MCLR

reset path. The filter will detect and ignore small pulses.

It should be noted that a WDT Reset does not drive

MCLR pin low.

FIGURE 11-4: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT

External

Reset

MCLR

VDD

OSC1

WDT

Module

VDD rise

detect

OST/PWRT

On-chip

RC OSC

WDT

Time-out

Power-on Reset

OST

10-bit Ripple counter

PWRT

Chip_Reset

10-bit Ripple counter

Reset

Enable OST

Enable PWRT

SLEEP

Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.

Brown-out

Reset

BODEN

(1)

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