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PIC16F870/P Datasheet(PDF) 103 Page - Microchip Technology |
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PIC16F870/P Datasheet(HTML) 103 Page - Microchip Technology |
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103 / 156 page ![]() © 1999 Microchip Technology Inc. Preliminary DS30569A-page 103 PIC16F870/871 FIGURE 11-12: WAKE-UP FROM SLEEP THROUGH INTERRUPT 11.14 In-Circuit Debugger When the DEBUG bit in the configuration word is pro- grammed to a ’0’, the In-Circuit Debugger functionality is enabled. This function allows simple debugging func- tions when used with MPLAB. When the microcontrol- ler has this feature enabled, some of the resources are not available for general use. Table 11-7 shows which features are consumed by the background debugger. TABLE 11-7: DEBUGGER RESOURCES To use the In-Circuit Debugger function of the micro- controller, the design must implement In-Circuit Serial Programming connections to MCLR/VPP, VDD, GND, RB7 and RB6. This will interface to the In-Circuit Debugger module available from Microchip or one of the third party development tool companies. 11.15 Program Verification/Code Protection If the code protection bit(s) have not been pro- grammed, the on-chip program memory can be read out for verification purposes. 11.16 ID Locations Four memory locations (2000h - 2003h) are designated as ID locations where the user can store checksum or other code-identification numbers. These locations are not accessible during normal execution but are read- able and writable during program/verify. It is recom- mended that only the 4 least significant bits of the ID location are used. Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 OSC1 CLKOUT(4) INT pin INTF flag (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW PC Instruction fetched Instruction executed PC PC+1 PC+2 Inst(PC) = SLEEP Inst(PC - 1) Inst(PC + 1) SLEEP Processor in SLEEP Interrupt Latency (Note 2) Inst(PC + 2) Inst(PC + 1) Inst(0004h) Inst(0005h) Inst(0004h) Dummy cycle PC + 2 0004h 0005h Dummy cycle TOST(2) PC+2 Note 1: XT, HS or LP oscillator mode assumed. 2: TOST = 1024TOSC (drawing not to scale) This delay will not be there for RC osc mode. 3: GIE = ’1’ assumed. In this case after wake- up, the processor jumps to the interrupt routine. If GIE = ’0’, execution will continue in-line. 4: CLKOUT is not available in these osc modes, but shown here for timing reference. I/O pins RB6, RB7 Stack 1 level Program Memory Address 0000h must be NOP Last 100h words Data Memory 0x070(0x0F0, 0x170, 0x1F0) 0x1EB - 0x1EF |
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