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PIC16F870/P Datasheet(PDF) 132 Page - Microchip Technology |
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PIC16F870/P Datasheet(HTML) 132 Page - Microchip Technology |
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132 / 156 page ![]() PIC16F870/871 DS30569A-page 132 Preliminary © 1999 Microchip Technology Inc. FIGURE 14-11: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING TABLE 14-7: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS FIGURE 14-12: USART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING TABLE 14-8: USART SYNCHRONOUS RECEIVE REQUIREMENTS Param No. Sym Characteristic Min Typ† Max Units Conditions 120 TckH2dtV SYNC XMIT (MASTER & SLAVE) Clock high to data out valid Standard(F) — — 80 ns Extended(LF) — — 100 ns 121 Tckrf Clock out rise time and fall time (Master Mode) Standard(F)— — 45 ns Extended(LF)— — 50 ns 122 Tdtrf Data out rise time and fall time Standard(F)— — 45 ns Extended(LF)— — 50 ns †: Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Parameter No. Sym Characteristic Min Typ† Max Units Conditions 125 TdtV2ckL SYNC RCV (MASTER & SLAVE) Data setup before CK ↓ (DT setup time) 15 —— ns 126 TckL2dtl Data hold after CK ↓ (DT hold time) 15 — — ns †: Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note: Refer to Figure 14-3 for load conditions. 121 121 122 RC6/TX/CK RC7/RX/DT Pin Pin 120 Note: Refer to Figure 14-3 for load conditions. 125 126 RC6/TX/CK RC7/RX/DT pin pin |
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