PIC16C641-04SLASHTQ datasheet(28/136 Pages) MICROCHIP

28 / 136 page

PIC16C64X & PIC16C66X

DS30559A-page 28

Preliminary

4.5

Indirect Addressing, INDF, and FSR

Registers

The INDF register is not a physical register. Addressing

the INDF register will cause indirect addressing.

Indirect addressing is possible by using the INDF reg-

ister. Any instruction using the INDF register actually

accesses data pointed to by the ﬁle select register

(FSR). Reading INDF itself indirectly will produce 00h.

Writing to the INDF register indirectly results in a no-

operation (although status bits may be affected). An

effective 9-bit address is obtained by concatenating the

8-bit FSR register and the IRP bit (STATUS<7>), as

shown in Figure 4-12. However, bit IRP is not used in

the PIC16C64X & PIC16C66X.

A simple program to clear RAM location 20h-2Fh using

indirect addressing is shown in Example 4-1.

EXAMPLE 4-1:

INDIRECT ADDRESSING

movlw 0x20

;initialize pointer

movwf FSR

;to RAM

clrf

INDF

;clear INDF register

incf

FSR

;inc pointer

btfss FSR,4 ;all done?

goto

;no goto next

;yes continue

CONTINUE:

FIGURE 4-12: DIRECT/INDIRECT ADDRESSING

For memory map detail see Figure 4-3 and Figure 4-4.

Note 1: Bits RP1 and IRP are reserved, always maintain these bits clear.

Data

Memory

Indirect Addressing

Direct Addressing

bank select

location select

(1)RP1 RP0

from opcode

IRP(1)

FSR register

bank select

location select

00h

7Fh

00h

7Fh

Bank 0

Bank 1

Bank 2

Bank 3

not used

PIC16C641-04/TQ Datasheet(PDF) 28 Page - Microchip Technology

PIC16C641-04/TQ Datasheet(HTML) 28 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL