PIC16C641-04SLASHTQ datasheet(9/136 Pages) MICROCHIP

9 / 136 page

Preliminary

DS30559A-page 9

PIC16C64X & PIC16C66X

3.0

ARCHITECTURAL OVERVIEW

The

high

performance

the

PIC16C64X

PIC16C66X devices can be attributed to a number of

architectural features commonly found in RISC micro-

processors.

begin

with,

the

PIC16C64X

PIC16C66X use a Harvard architecture in which pro-

gram and data are accessed from separate memories

using separate buses. This improves bandwidth over

traditional von Neumann architecture where program

and data are fetched from the same memory. Separat-

ing program and data memory further allows instruc-

tions to be sized differently than an 8-bit wide data

word. Instruction opcodes are 14-bits wide making it

possible to have all single word instructions. A 14-bit

wide program memory access bus fetches a 14-bit

instruction in a single cycle. A two-stage pipeline over-

laps fetch and execution of instructions. Consequently,

all instructions (35) execute in a single cycle (200 ns @

20 MHz) except for program branches, which require

two cycles.

The PIC16C641 and PIC16C661 both address 2K x 14

on-chip program memory while the PIC16C642 and

PIC16C662 address 4K x 14. All program memory is

internal.

PIC16C64X & PIC16C66X devices can directly or indi-

rectly address their register ﬁles or data memory. All

special function registers including the program

counter are mapped in the data memory. These

devices have an orthogonal (symmetrical) instruction

set that makes it possible to carry out any operation on

any register using any addressing mode. This symmet-

rical nature and lack of ‘special optimal situations’

make programming with the PIC16C64X & PIC16C66X

simple yet efﬁcient. In addition, the learning curve is

reduced signiﬁcantly.

PIC16C64X & PIC16C66X devices contain an 8-bit

ALU and working register. The ALU is a general pur-

pose arithmetic unit. It performs arithmetic and Bool-

ean functions between data in the working register and

any register ﬁle.

The ALU is 8-bits wide and capable of addition,

subtraction, shift, and logical operations. Unless

otherwise mentioned, arithmetic operations are two's

complement in nature. In two-operand instructions,

typically

one

operand

the

working

(W register). The other operand is a ﬁle register or an

immediate constant. In single operand instructions, the

operand is either the W register or a ﬁle register.

The W register is an 8-bit working register used for ALU

operations. It is not an addressable register.

Depending on the instruction executed, the ALU may

affect the values of the Carry (C), Digit Carry (DC), and

Zero (Z) bits in the STATUS register. The C and DC bits

operate as a Borrow and Digit Borrow out bit,

respectively, bit in subtraction. See the SUBLW and

SUBWF

instructions for examples.

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