PIC16C641-04SLASHTQ datasheet(56/136 Pages) MICROCHIP

56 / 136 page

PIC16C64X & PIC16C66X

DS30559A-page 56

Preliminary

9.1

Conﬁguration Bits

The conﬁguration bits can be programmed (read as '0')

or left unprogrammed (read as '1') to select various

device conﬁgurations. These bits are mapped in

program memory location 2007h.

The user will note that address 2007h is beyond

the user program memory space. In fact, it belongs

to the special

test/conﬁguration

memory

space

(2000h–3FFFh), which can be accessed only during

programming.

FIGURE 9-1:

CONFIGURATION WORD

CP1

CP0

CP1

CP0

CP1

CP0

MPEEN

BODEN CP1

CP0

PWRTE

WDTE

FOSC1 FOSC0

CONFIG

Address

2007h

bit13

bit0

bit 13-8

CP1:CP0: Code protection bits(2)

5-4:

= Code protection off

= Upper half of program memory code protected

= Upper 3/4th of program memory code protected

= All memory is code protected

bit 7:

MPEEN: Memory Parity Error Enable

1 = Memory Parity Checking is enabled

0 = Memory Parity Checking is disabled

bit 6:

BODEN: Brown-out Reset Enable bit (1)

1 = BOR enabled

0 = BOR disabled

bit 3:

PWRTE: Power-up Timer Enable bit (1)

1 = PWRT disabled

0 = PWRT enabled

bit 2:

WDTE: Watchdog Timer Enable bit

1 = WDT enabled

0 = WDT disabled

bit 1-0:

FOSC1:FOSC0: Oscillator Selection bits

= RC oscillator

= HS oscillator

= XT oscillator

= LP oscillator

Note

1: Enabling Brown-out Reset automatically enables the Power-up Timer (PWRT) regardless of the value of bit PWRTE. Ensure the

Power-up Timer is enabled anytime Brown-out Reset is enabled.

2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.

PIC16C641-04/TQ Datasheet(PDF) 56 Page - Microchip Technology

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