L6751B datasheet(14/58 Pages) STMICROELECTRONICS

14 / 58 page

Pin description and connection diagram

L6751B

14/58

Doc ID 024028 Rev 1

COMP /

ADDR

Error amplifier output.

Connect with an (RF - CF)// CP to FB. The device cannot be disabled by

pulling low this pin.

Connect RCOMP = 12.5 kΩ to GND to extend PMBus addressing range

(see Table 9).

Error amplifier inverting input.

Connect with a resistor RFB // (RI - CI) to VSEN and with an (RF - CF)// CP

to COMP.

VSEN

Output voltage monitor, manages OV and UV protection.

Connect to the positive side of the load to perform remote sense.

FBR

Remote buffer positive sense.

Connect to the positive side of the multi-phase load to perform remote

sense.

LTB

LTB Technology input pin. See Section 11.2 for details.

RGND

Remote ground sense.

Connect to the negative side of the multi-phase load to perform remote

sense.

REF

The reference used for the multi-phase section regulation is available on

this pin with -125 mV offset. Connect through an RREF-CREF to GND to

optimize DVID transitions. Connect through ROS resistor to FB pin to

implement small positive offset to the regulation.

IMON

Current monitor output.

A current proportional to the multi-phase load current is sourced from this

pin. Connect through a resistor RMON to GND. The information available

on this pin is used for the current reporting and DPM. The pin can be

filtered through CIMON to GND.

SVR_RDY

(PWROK)

VR Ready (Intel mode). Open drain output set free after SS has finished

and pulled low when triggering any protection for the single-phase section.

Pull up to a voltage lower than 3.3 V (typ.), if not used it can be left floating.

PowerOK (AMD mode). System-wide Power Good input. When low, the

device decodes SVC and SVD to determine the boot voltage.

ENDRV

Enable driver.

CMOS output driven high when the IC commands the drivers. Used in con-

junction with the HiZ window on the PWMx pins to optimize the multi-

phase section overall efficiency. Connect directly to external driver enable

pin.

PWM6

PWM output.

Connect to related multi-phase channel external driver PWM input. During

normal operation the device is able to manage HiZ status by setting and

holding the PWMx pin to fixed voltage defined before. See Table 7 for

phase number programming.

PWM5

PWM4

PAD

GND

GND connection. All internal references and logic are referenced to this

pin. Filter to VCC with proper MLCC capacitor and connect to the PCB

GND plane.

Table 2.

Pin description (continued)

Pin#

Name

Type

Function

L6751B Datasheet(PDF) 14 Page - STMicroelectronics

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