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L6751B Datasheet(PDF) 25 Page - STMicroelectronics

Part # L6751B
Description  Digitally controlled dual PWM for Intel VR12 and AMD SVI
PDF  58 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6751B Datasheet(HTML) 25 Page - STMicroelectronics

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L6751B
Device configuration and pinstrapping tables
Doc ID 024028 Rev 1
25/58
Note:
1
Recommended values, divider needs to be connected between VCC5 pin and GND.
2
BOOT is ignored in AMD mode, only TMAX is operative.
3
Operative mode defined by ADDR pin. See Table 9 for details.
56
36
0.000 V
1.100 V
VSA
10
μsec
(functional)
ON
1.350 V
32
μSec
(debug)
130
18
13
120
15
12
110
18
16
100
15
14.7
0.000 V
1.000 V
VSA
10
μsec
(functional)
10
μSec
(functional)
130
10
11
120
18
22
110
56
75
100
10
15
0.000 V
0.900 V
VSA
10
μsec
(functional)
OFF
1.500 V
32
μSec
(debug)
130
12
20
120
12
22.6
110
39
82
100
47
110
0.000 V
1.000 V
GFX
32
μsec
(debug)
10
μSec
(functional)
130
10
27
120
22
68
110
10
36
100
18
75
1.000 V
1.000 V
GFX
32
μsec
(debug)
OFF
1.350 V
32
μSec
(debug)
130
15
75
120
10
59
110
10
75
100
10
100
0.000 V
0.000 V
GFX
10
μsec
(functional)
10
μSec
(functional)
130
10
150
120
10
220
110
10
Open
100
Table 10.
BOOT / TMAX pinstrapping (Note 1, 2) (continued)
Rdown
[k
Ω]
Rup
[k
Ω]
BOOT - Intel address 0000b (Note 3)
Intel address 0010b, 0100b (Note 3)
TMAX [C]
Multi-
phase
Single-
phase
Link-rest
JMode
VBOOT
Link rest



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