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MSP430FR6972IPM Datasheet(PDF) 52 Page - Texas Instruments

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Part # MSP430FR6972IPM
Description  Mixed?멣ignal Microcontrollers
PDF  157 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MSP430FR6972IPM Datasheet(HTML) 52 Page - Texas Instruments

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SDA
SCL
t
HD,DAT
t
SU,DAT
t
HD,STA
t
HIGH
t
LOW
t
BUF
t
HD,STA
t
SU,STA
t
SP
t
SU,STO
MSP430FR6972, MSP430FR69721, MSP430FR6970, MSP430FR6872
MSP430FR68721, MSP430FR6870, MSP430FR6922, MSP430FR69221
MSP430FR6920, MSP430FR6822, MSP430FR68221, MSP430FR6820
SLASE23C – JANUARY 2015 – REVISED MAY 2015
www.ti.com
Table 5-21. eUSCI (I2C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5-18)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
feUSCI
eUSCI input clock frequency
External: UCLK
16
MHz
Duty cycle = 50% ± 10%
fSCL
SCL clock frequency
2.2 V, 3.0 V
0
400
kHz
fSCL = 100 kHz
4.0
tHD,STA
Hold time (repeated) START
2.2 V, 3.0 V
µs
fSCL > 100 kHz
0.6
fSCL = 100 kHz
4.7
tSU,STA
Setup time for a repeated START
2.2 V, 3.0 V
µs
fSCL > 100 kHz
0.6
tHD,DAT
Data hold time
2.2 V, 3.0 V
0
ns
tSU,DAT
Data setup time
2.2 V, 3.0 V
100
ns
fSCL = 100 kHz
4.0
tSU,STO
Setup time for STOP
2.2 V, 3.0 V
µs
fSCL > 100 kHz
0.6
fSCL = 100 kHz
4.7
Bus free time between a STOP and
tBUF
us
START condition
fSCL > 100 kHz
1.3
UCGLITx = 0
50
250
UCGLITx = 1
25
125
Pulse duration of spikes suppressed by
tSP
2.2 V, 3.0 V
ns
input filter
UCGLITx = 2
12.5
62.5
UCGLITx = 3
6.3
31.5
UCCLTOx = 1
27
tTIMEOUT
Clock low time-out
UCCLTOx = 2
2.2 V, 3.0 V
30
ms
UCCLTOx = 3
33
Figure 5-18. I2C Mode Timing
52
Specifications
Copyright © 2015, Texas Instruments Incorporated
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Product Folder Links: MSP430FR6972 MSP430FR69721 MSP430FR6970 MSP430FR6872 MSP430FR68721
MSP430FR6870 MSP430FR6922 MSP430FR69221 MSP430FR6920 MSP430FR6822 MSP430FR68221
MSP430FR6820



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