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MSP430FR6972IPM Datasheet(PDF) 79 Page - Texas Instruments |
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MSP430FR6972IPM Datasheet(HTML) 79 Page - Texas Instruments |
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79 / 157 page ![]() MSP430FR6972, MSP430FR69721, MSP430FR6970, MSP430FR6872 MSP430FR68721, MSP430FR6870, MSP430FR6922, MSP430FR69221 MSP430FR6920, MSP430FR6822, MSP430FR68221, MSP430FR6820 www.ti.com SLASE23C – JANUARY 2015 – REVISED MAY 2015 6.11.13 Timer_B TB0 TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers each. It can support multiple capture/compares, PWM outputs, and interval timing. It has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Table 6-14. Timer_B TB0 Signal Connections MODULE DEVICE INPUT MODULE INPUT MODULE DEVICE OUTPUT INPUT PORT PIN OUTPUT OUTPUT PORT PIN SIGNAL SIGNAL BLOCK SIGNAL SIGNAL P2.0 or P3.3 or TB0CLK TBCLK P5.7 ACLK (internal) ACLK Timer N/A N/A SMCLK (internal) SMCLK P2.0 or P3.3 or TB0CLK INCLK P5.7 P3.4 TB0.0 CCI0A P3.4 P6.4 TB0.0 CCI0B P6.4 CCR0 TB0 TB0.0 ADC12 (internal) (1) DVSS GND ADC12SHSx = {2} DVCC VCC P3.5 or P6.5 TB0.1 CCI1A P3.5 COUT (internal) CCI1B P6.5 CCR1 TB1 TB0.1 ADC12 (internal) (1) DVSS GND ADC12SHSx = {3} DVCC VCC P3.6 or P6.6 TB0.2 CCI2A P3.6 ACLK (internal) CCI2B P6.6 CCR2 TB2 TB0.2 DVSS GND DVCC VCC DVSS CCI3A P3.7 TB0.3 CCI3B P3.7 CCR3 TB3 TB0.3 DVSS GND DVCC VCC DVSS CCI4A P2.2 TB0.4 CCI4B P2.2 CCR4 TB4 TB0.4 DVSS GND DVCC VCC DVSS CCI5A P2.1 TB0.5 CCI5B P2.1 CCR5 TB5 TB0.5 DVSS GND DVCC VCC DVSS CCI6A P2.0 TB0.6 CCI6B P2.0 CCR6 TB6 TB0.6 DVSS GND DVCC VCC (1) Only on devices with ADC. Copyright © 2015, Texas Instruments Incorporated Detailed Description 79 Submit Documentation Feedback Product Folder Links: MSP430FR6972 MSP430FR69721 MSP430FR6970 MSP430FR6872 MSP430FR68721 MSP430FR6870 MSP430FR6922 MSP430FR69221 MSP430FR6920 MSP430FR6822 MSP430FR68221 MSP430FR6820 |
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