DP83924 datasheet(2/42 Pages) NSC

2 / 42 page

General Description (Continued)

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The various modes on the 4TPHY can be configured and

controlled via the MII management interface. This manage-

ment interface makes inter-operability with other manufac-

turers MAC units relatively easy. If no management

interface is desired, most of the critical operating modes of

the transceiver can be set via strapping options (latching

configuration information during reset). The ENDEC sec-

tion of the transceiver also supplies a simple Non-Return-

to-Zero (NRZ) interface to transmit and receive data

to/from standard 10 Mb/s MACs.

The transceivers include on-chip filtered transmit outputs,

which reduce emissions and eliminate the need for exter-

nal filter.

The DP83924BVCE maintains complete hardware and

software backwards compatibility with the DP83924AVCE

with only a change to one resistor value and disconnecting

a second resistor.

Block Diagram

Output

Driver

Trans-

mit

Filter

Transmit

Pre-emphasis

/TX Logic

Link

Genera-

tor

Manches-

terEncoder

Transmit

AUI

Driver

Transmit

Control

Interface

TXE

TXD

TXC

Oscilla-

tor Pres-

caler

Management

Control Inter-

face

MDC

MDIO

Smart

Squelch

Link

Detect

Phase

Lock

Loop

Receive

Control

Interface

/decoder

CRS

RXD

RXC

MUX

Rcv

AUI Rcv

Collision

Decoder

/Translator

COL

Heartbeat

Jabber

MUX

Common

Analog

/PLL for

Wave

Shapers

Transceiver

+ ENDEC Block

(replicated 4

times)

AUI Colli-

sion

TPLBK

AUI

Configu-

ration

Registers

RXI+

RXI-

TXU+

TXU-

CD+

CD-

TX+

TX-

RX+

RX-

LED_CLK

LED_DATA

LED Control

Interface

DP83924 Datasheet(PDF) 2 Page - National Semiconductor (TI)

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