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TAS3108DCPR Datasheet(PDF) 16 Page - Texas Instruments

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Part # TAS3108DCPR
Description  AUDIO DIGITAL SIGNAL PROCESSORS
PDF  63 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS3108DCPR Datasheet(HTML) 16 Page - Texas Instruments

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3.8.5
SAP Input to SAP Output—Processing Flow
TAS3108, TAS3108IA
AUDIO DIGITAL SIGNAL PROCESSORS
SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007
All SAP data format options other than I2S result in a two-sample delay from input to output, as shown in
Figure 3-7. If I2S formatting is used for both the input SAP and the output SAP, the polarity of LRCLK in
Figure 3-7 must be inverted. However, if I2S format conversions are performed between input and output,
the delay becomes either 1.5 samples or 2.5 samples, depending on the processing clock frequency
selected for the audio DSP core relative to the sample rate of the incoming data.
The I2S format uses the falling edge of LRCLK to begin a sample period, whereas all other formats use
the rising edge of LRCLK to begin a sample period. This means that the input SAP and audio DSP core
operate on sample windows that are 180
° out of phase, with respect to the sample window used by the
output SAP. This phase difference results in the output SAP outputting a new data sample at the midpoint
of the sample period used by the audio DSP core to process the data. If the processing cycle completes
all processing tasks before the midpoint of the processing sample period, the output SAP outputs this
processed data. However, if the processing time extends past the midpoint of the processing sample
period, the output SAP outputs the data processed during the previous processing sample period. In the
former case, the delay from input to output is 1.5 samples. In the latter case, the delay from input to output
is 2.5 samples.
Therefore, delay from input to output can be either 1.5 or 2.5 sample times when data format conversions
are performed that involve the I2S format. However, which delay time is obtained for a particular
application is determinable and fixed for that application, providing care is taken in the selection of
MCLKI/XTALI with respect to the incoming sample clock, LRCLK.
Physical Characteristics
16
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