Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

TAS3108DCPR Datasheet(PDF) 37 Page - Texas Instruments

Click here to check the latest version.
Part # TAS3108DCPR
Description  AUDIO DIGITAL SIGNAL PROCESSORS
PDF  63 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS3108DCPR Datasheet(HTML) 37 Page - Texas Instruments

Back Button TAS3108DCPR Datasheet HTML 33Page - Texas Instruments TAS3108DCPR Datasheet HTML 34Page - Texas Instruments TAS3108DCPR Datasheet HTML 35Page - Texas Instruments TAS3108DCPR Datasheet HTML 36Page - Texas Instruments TAS3108DCPR Datasheet HTML 37Page - Texas Instruments TAS3108DCPR Datasheet HTML 38Page - Texas Instruments TAS3108DCPR Datasheet HTML 39Page - Texas Instruments TAS3108DCPR Datasheet HTML 40Page - Texas Instruments TAS3108DCPR Datasheet HTML 41Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 37 / 63 page
background image
www.ti.com
7
I
2C Register Map
TAS3108, TAS3108IA
AUDIO DIGITAL SIGNAL PROCESSORS
SLES152B – OCTOBER 2005 – REVISED NOVEMBER 2007
NO. OF
INITIALIZATION
SUBADDRESS
REGISTER NAME
CONTENTS
BYTES
VALUE
0x00
Clock and SAP control register
4
Description shown in Section 7.1
0x01, 0x00, 0x1B, 0x22
0x01
Reserved
4
Reserved
0x00, 0x00, 0x00, 0x40
0x02
Status register
4
Description shown in Section 7.2
0x00, 0x00, 0x00, 0x00
0x03
Unused
0x00, 0x00, 0x00, 0x00
0x04
I2C memory load control register
8
Description shown in Section 7.3
0x05
I2C memory load data register
8
Description shown in Section 7.3
0x06
PEEK/POKE address
4
u(31:24)(1), MemSelect(23:16),
0x00, 0x00, 0x00, 0x00
Addr(15:8), Addr(7:0)
0x07
PEEK/POKE data
16
D(63:56), D(55:48), D(47:40), D(39:32),
0x00, 0x00, 0x00, 0x00
D(31:24), D(23:16), D(15:8), D(7:0)
0x08
Version number
4
TAS3108/TAS3108IA version
0x00, 0x00, 0x00, 0x01
0x09
User-defined
4, 8, 12, 16, or
User-defined register 1
User-defined
20
0x0A
User-defined
4, 8, 12, 16, or
User-defined register 2
User-defined
20
•
•
•
•
•
•
0xFE
User-defined
4, 8, 12, 16, or
User-defined register 246
User-defined
20
0xFF
User-defined
4, 8, 12, 16, or
User-defined register 247
User-defined
20
(1)
u indicates unused bits.
In the following sections, BOLD indicates the default state of the bit fields.
Submit Documentation Feedback
37
I2C Register Map
Not Recommended for New Designs



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com