LMV844MTSLASHNOPB datasheet(4/38 Pages) TI1

4 / 38 page

LMV841, LMV842, LMV844

LMV841-Q1, LMV842-Q1, LMV844-Q1

SNOSAT1H – OCTOBER 2006 – REVISED JULY 2016

www.ti.com

Product Folder Links: LMV841 LMV842 LMV844 LMV841-Q1 LMV842-Q1 LMV844-Q1

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(1)

Human-body model, applicable std. MIL-STD-883, Method 3015.7.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic

discharge

Human-body model (HBM)(1)

±2000

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±250

(1)

The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient

temperature is PD = (TJ(MAX) - TA) / θJA . All numbers apply for packages soldered directly onto a PCB.

6.3 Recommended Operating Conditions

MIN

MAX

UNIT

Temperature(1)

−40

125

°C

Supply voltage (V+ – V−)

2.7

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2)

The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient

temperature is PD = (TJ(MAX) - TA) / θJA . All numbers apply for packages soldered directly onto a PCB.

6.4 Thermal Information

THERMAL METRIC(1)

LMV84x

UNIT

DCK (SC70)

DGK

(VSSOP)

D (SOIC)

(TSSOP)

5 PINS

8 PINS

14 PIN

14 PINS

RθJA

Junction-to-ambient thermal resistance(2)

334

205

126

110

°C/W

(1)

Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device.

(2)

Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using

statistical quality control (SQC) method.

(3)

Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary

over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped

production material.

(4)

This parameter is ensured by design and/or characterization and is not tested in production.

(5)

Positive current corresponds to current flowing into the device.

6.5 Electrical Characteristics – 3.3 V

Unless otherwise specified, all limits are ensured for TA = 25°C, V

+ = 3.3 V, V− = 0 V, V

CM = V

+/2, and R

L > 10 MΩ to V

+/2.(1)

PARAMETER

TEST CONDITIONS

MIN(2)

TYP(3)

MAX(2)

UNIT

VOS

Input offset voltage

–500

±50

500

µV

at the temperature extremes

–800

800

TCVOS

Input offset voltage drift (4)

0.5

µV/°C

at the temperature extremes

–5

Input bias current (4) (5)

0.3

at the temperature extremes

300

IOS

Input offset current

CMRR

Common-mode rejection ratio

LMV841

0 V

≤ VCM ≤ 3.3 V

112

at the temperature

extremes

Common-mode rejection ratio

LMV842 and LMV844

0 V

≤ VCM ≤ 3.3 V

106

at the temperature

extremes

PSRR

Power supply rejection ratio

2.7 V

≤ V+ ≤ 12 V, VO = V

+/2

108

at the temperature

extremes

CMVR

Input common-mode voltage

range

CMRR

≥ 50 dB, at the temperature extremes

–0.1

3.4

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