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LMV844MT/NOPB Datasheet(PDF) 6 Page - Texas Instruments |
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LMV844MT/NOPB Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 38 page ![]() 6 LMV841, LMV842, LMV844 LMV841-Q1, LMV842-Q1, LMV844-Q1 SNOSAT1H – OCTOBER 2006 – REVISED JULY 2016 www.ti.com Product Folder Links: LMV841 LMV842 LMV844 LMV841-Q1 LMV842-Q1 LMV844-Q1 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated (1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. (2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. (3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. (4) This parameter is ensured by design and/or characterization and is not tested in production. (5) Positive current corresponds to current flowing into the device. (6) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA) / θJA . All numbers apply for packages soldered directly onto a PCB. (7) Short circuit test is a momentary test. (8) Number specified is the slower of positive and negative slew rates. 6.6 Electrical Characteristics – 5 V Unless otherwise specified, all limits are ensured for TA = 25°C, V + = 5 V, V− = 0 V, V CM = V +/2, and R L > 10 MΩ to V +/2.(1) PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT VOS Input offset voltage –500 ±50 500 µV at the temperature extremes –800 800 TCVOS Input offset voltage drift (4) 0.35 µV/°C at the temperature extremes –5 5 IB Input bias current (4) (5) 0.3 10 pA at the temperature extremes 300 IOS Input offset current 40 fA CMRR Common-mode rejection ratio LMV841 0V ≤ VCM ≤ 5V 86 112 dB at the temperature extremes 80 Common-mode rejection ratio LMV842 and LMV844 0V ≤ VCM ≤ 5V 81 106 dB at the temperature extremes 79 PSRR Power supply rejection ratio 2.7V ≤ V+ ≤ 12V, VO = V+/2 86 108 dB at the temperature extremes 82 CMVR Input common-mode voltage range CMRR ≥ 50 dB, at the temperature extremes –0.2 5.2 V AVOL Large signal voltage gain RL = 2 kΩ VO = 0.3V to 4.7V 100 125 dB at the temperature extremes 96 RL = 10 kΩ VO = 0.2V to 4.8V 100 133 dB at the temperature extremes 96 VO Output swing high, (measured from V+) RL = 2 kΩ to V +/2 68 100 mV at the temperature extremes 120 RL = 10 kΩ to V +/2 32 50 mV at the temperature extremes 70 Output swing low, (measured from V-) RL = 2 kΩ to V +/2 78 120 mV at the temperature extremes 140 RL = 10 kΩ to V +/2 38 70 mV at the temperature extremes 80 IO Output short-circuit current (6) (7) Sourcing VO = V +/2 VIN = 100 mV 20 33 mA at the temperature extremes 15 Sinking VO = V +/2 VIN = −100 mV 20 28 mA at the temperature extremes 15 IS Supply current Per Channel 0.96 1.5 mA at the temperature extremes 2 SR Slew rate (8) AV = +1, VO = 4 VPP 10% to 90% 2.5 V/µs GBW Gain bandwidth product 4.5 MHz Φm Phase margin 67 Deg en Input-referred voltage noise f = 1 kHz 20 nV/ |
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