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TMS320C6711 Datasheet(PDF) 76 Page - Texas Instruments

Part # TMS320C6711
Description  FLOATING-POINT DIGITAL SIGNAL PROCESSORS
PDF  129 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320C6711 Datasheet(HTML) 76 Page - Texas Instruments

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TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS088L − FEBRUARY 1999 − REVISED MAY 2004
76
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
ASYNCHRONOUS MEMORY TIMING (CONTINUED)
switching characteristics over recommended operating conditions for asynchronous memory
cycles†‡§ (see Figure 30–Figure 31) [C6711]
NO
PARAMETER
C6711−100
C6711−150
UNIT
NO.
PARAMETER
MIN
MAX
MIN
MAX
UNIT
1
tosu(SELV-AREL)
Output setup time, select signals valid to ARE low
RS * E − 3
RS * E − 3
ns
2
toh(AREH-SELIV)
Output hold time, ARE high to select signals
invalid
RH * E − 3
RH * E − 3
ns
5
td(EKOH-AREV)
Delay time, ECLKOUT high to ARE valid
1.5
11
1.5
8
ns
8
tosu(SELV-AWEL)
Output setup time, select signals valid to AWE low
WS * E − 3
WS * E − 3
ns
9
toh(AWEH-SELIV)
Output hold time, AWE high to select signals invalid
WH * E − 3
WH * E − 3
ns
10
td(EKOH-AWEV)
Delay time, ECLKOUT high to AWE valid
1.5
11
1.5
8
ns
switching characteristics over recommended operating conditions for asynchronous memory
cycles†‡§ (see Figure 30–Figure 31) [C6711B]
NO.
PARAMETER
C6711B−100
C6711BGFNA-100
C6711B−150
UNIT
NO.
PARAMETER
MIN
MAX
MIN
MAX
UNIT
1
tosu(SELV-AREL)
Output setup time, select signals valid to ARE low
RS * E − 3
RS * E − 3
ns
2
toh(AREH-SELIV)
Output hold time, ARE high to select signals
invalid
RH * E − 3
RH * E − 3
ns
5
td(EKOH-AREV)
Delay time, ECLKOUT high to ARE valid
1
11
1
8
ns
8
tosu(SELV-AWEL)
Output setup time, select signals valid to AWE low
WS * E − 3
WS * E − 3
ns
9
toh(AWEH-SELIV)
Output hold time, AWE high to select signals invalid
WH * E − 3
WH * E − 3
ns
10
td(EKOH-AWEV)
Delay time, ECLKOUT high to AWE valid
1
11
1
8
ns
switching characteristics over recommended operating conditions for asynchronous memory
cycles†‡§ (see Figure 30–Figure 31) [C6711C/C6711D]
NO.
PARAMETER
GDPA-167
−200
−250 (6711D)
UNIT
MIN
MAX
1
tosu(SELV-AREL)
Output setup time, select signals valid to ARE low
RS*E − 1.7
ns
2
toh(AREH-SELIV)
Output hold time, ARE high to select signals invalid
RH*E − 1.7
ns
5
td(EKOH-AREV)
Delay time, ECLKOUT high to ARE valid
1.5
7
ns
8
tosu(SELV-AWEL)
Output setup time, select signals valid to AWE low
WS*E − 1.7
ns
9
toh(AWEH-SELIV)
Output hold time, AWE high to select signals and EDx invalid
WH*E − 1.7
ns
10
td(EKOH-AWEV)
Delay time, ECLKOUT high to AWE valid
1.5
7
ns
11
tosu(EDV-AWEL)
Output setup time, ED valid to AWE low
(WS−1)*E −
1.7
ns
† RS = Read setup, RST = Read strobe, RH = Read hold, WS = Write setup, WST = Write strobe, WH = Write hold. These parameters are
programmed via the EMIF CE space control registers.
‡ E = ECLKOUT period in ns
§ Select signals include: CEx, BE[3:0], EA[21:2], and AOE.



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