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TMS320C6711 Datasheet(PDF) 16 Page - Texas Instruments

Part # TMS320C6711
Description  FLOATING-POINT DIGITAL SIGNAL PROCESSORS
PDF  129 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320C6711 Datasheet(HTML) 16 Page - Texas Instruments

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TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS088L − FEBRUARY 1999 − REVISED MAY 2004
16
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
signal groups description
HHWIL
HCNTL0
HCNTL1
TRST
EXT_INT7#
IEEE Standard
1149.1
(JTAG)
Emulation
Reserved
Data
Register Select
Half-Word
Select
Reset and
Interrupts
Control
HPI
(Host-Port Interface)
16
Control/Status
TDI
TDO
TMS
TCK
EMU0
EMU1
HD[15:0]
NMI
HAS
HR/W
HCS
HDS1
HDS2
HRDY
HINT
EXT_INT6#
EXT_INT5#
EXT_INT4#
RESET
RSV
RSV
RSV
RSV
RSV
Clock/PLL
CLKIN
CLKOUT2‡
CLKMODE0
PLLV
PLLG
PLLF
CLKOUT3†
EMU2
EMU3
EMU4
EMU5
RSV
CLKOUT1§
PLLHV†
•
•
•
† The CLKOUT3 and PLLHV pin functions are applicable to the C6711C/C6711D device only.
‡ For the C6711C/C6711D device, the CLKOUT2 pin is multiplexed with the GP[2] pin. Default function is CLKOUT2. To use this
pin as GPIO, the GP2EN bit in the GPEN register and the GP2DIR bit in the GPDIR register must be properly configured.
§ The CLKOUT1 pin function is applicable to the C6711/C6711B devices only.
These pins apply to the C6711/C6711B devices only. The C6711C/C6711D device has a different PLL module and PLL
Controller; therefore, the PLLV, PLLG, and PLLF pins are not necessary on the C6711C/C6711D device.
# For the C6711C/C6711D device, the external interrupts (EXT_INT[7−4]) go through the general-purpose input/output (GPIO)
module. When used as interrupt inputs, the GP[7−4] pins must be configured as inputs (via the GPDIR register) and enabled
(via the GPEN register) in addition to enabling the interrupts in the interrupt enable register (IER).
Figure 3. CPU (DSP Core) and Peripheral Signals



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