EMC1184 datasheet(34/48 Pages) MICROCHIP

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Quad Channel 1°C Temperature Sensor with Beta Compensation and 1.8V SMBus Communications

Datasheet

Revision 1.0 (07-11-13)

SMSC EMC1184

DATASHEET

The Therm Limit Registers are used to determine whether a critical thermal event has occurred. If the

measured temperature exceeds the Therm Limit, the THERM pin is asserted. The limit setting must

match the chosen data format of the temperature reading registers.

Unlike the ALERT / THERM2 pin, the THERM pin cannot be masked. Additionally, the THERM pin will

be released once the temperature drops below the corresponding threshold minus the Therm

Hysteresis.

6.10

External Diode Fault Register 1Bh

The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the

Status Register to be set. This register is cleared when it is read.

Bit 3 - E3FLT - This bit is set if the External Diode 3 channel reported a diode fault.

Bit 2 - E2FLT - This bit is set if the External Diode 2 channel reported a diode fault.

Bit 1 - E1FLT - This bit is set if the External Diode 1 channel reported a diode fault.

6.11

Channel Mask Register 1Fh

The Channel Mask Register controls individual channel masking. When a channel is masked, the

ALERT / THERM2 pin will not be asserted when the masked channel reads a diode fault or out of limit

error. The channel mask does not mask the THERM pin.

Bit 3 - E3MASK - Masks the ALERT / THERM2pin from asserting when the External Diode 3 channel

is out of limit or reports a diode fault.



‘0’ (default) - The External Diode 3 channel will cause the ALERT / THERM2pin to be asserted if

it is out of limit or reports a diode fault.

21h

R/W

Therm

Hysteresis

128

0Ah

(10°C)

30h

R/W

External

Diode 3

Therm Limit

128

55h

(85°C)

Table 6.11 External Diode Fault Register

ADDR.

R/W

DEFAULT

1Bh

R-C

External

Diode Fault

E3FLT

E2FLT

E1FLT

00h

Table 6.12 Channel Mask Register

ADDR.

R/W

DEFAULT

1Fh

R/W

Channel

Mask

---

MASK

INT

MASK

00h

Table 6.10 Therm Limit Registers (continued)

ADDR.

R/W

DEFAULT

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