EMC1184 datasheet(41/48 Pages) MICROCHIP

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Quad Channel 1°C Temperature Sensor with Beta Compensation and 1.8V SMBus Communications

Datasheet

SMSC EMC1184

Revision 1.0 (07-11-13)

DATASHEET

6.17

Therm Limit Status Register 37h

The Therm Limit Status Register contains the status bits that are set when a temperature channel

Therm Limit is exceeded. If any of these bits are set, the THERM status bit in the Status Register is

set. Reading from the Therm Limit Status Register will not clear the status bits. Once the temperature

drops below the Therm Limit minus the Therm Hysteresis, the corresponding status bits will be

automatically cleared. The THERM bit in the Status Register will be cleared when all individual channel

THERM bits are cleared.

Bit 3 - This bit is set when the External Diode 3 channel exceeds its programmed Therm Limit. When

set, this bit will assert the THERM pin.

Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds its programmed Therm

Limit. When set, this bit will assert the THERM pin.

Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds its programmed Therm

Limit. When set, this bit will assert the THERM pin.

Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds its programmed Therm Limit.

When set, this bit will assert the THERM pin.

6.18

Filter Control Register 40h

The Filter Configuration Register controls the digital filter on the External Diode 1 channel.

Bits 1-0 - FILTER[1:0] - Control the level of digital filtering that is applied to the External Diode 1

temperature measurement as shown in Table 6.24. See Figure 5.4 and Figure 5.5 for examples on the

filter behavior.

Table 6.22 Therm Limit Status Register

ADDR.

R/W

DEFAULT

37h

R-C

Therm

Limit

Status

THERM

ITHERM

00h

Table 6.23 Filter Configuration Register

ADDR.

R/W

DEFAULT

40h

R/W

Filter Control

FILTER[1:0]

00h

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