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MCP3914 Datasheet(PDF) 41 Page - Microchip Technology

Part # MCP3914
Description  3V Eight-Channel Analog Front End
PDF  80 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3914 Datasheet(HTML) 41 Page - Microchip Technology

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 2013 Microchip Technology Inc.
DS20005216A-page 41
MCP3914
The default device address bits are A<6:5> = 01 (con-
tact the Microchip factory for other available device
address bits). For more information, see the Product
Identification System
section. The register map is
defined in Table 8-1.
6.3
Reading from the Device
The first register read on the SDO pin is the one defined
by the address (A<4:0>) given in the CONTROL byte.
After this first register is fully transmitted, if the CS pin
is maintained logic low, the communication continues
without an additional control byte and the SDO pin
transmits
another
register
with
the
address
automatically incremented or not, depending on the
READ<1:0> bit settings.
Four different Read mode configurations can be
defined through the READ<1:0> bits in the STATUS-
COM register for the address increment (see
Section 6.5, Continuous Communications, Loop-
ing on Register Sets
and Table 8-2). The data on SDO
is clocked out of the MCP3914 on the falling edge of
SCK. The reading format for each register is defined on
Section 6.5 “Continuous Communications, Loop-
ing on Register Sets”
.
FIGURE 6-2:
Read on a Single Register with 24-bit Format (WIDTH_DATA<1:0> = 01,
SPI Mode 1,1).
FIGURE 6-3:
Read on a Single Register with 24-bit Format (WIDTH_DATA<1:0> = 01,
SPI Mode 0,0).
READ Communication (SPI mode 1,1)
Don’t care
Don’t care
SCK
SDI
SDO
CS
DATA<0>
Hi-Z
Hi-Z
Device latches SDI on rising edge
Device latches SDO on falling edge
R/W
READ Communication (SPI mode 0,0)
Don’t care
Don’t care
Don’t care
SCK
SDI
SDO
CS
DATA<23>
Hi-Z
Hi-Z
Device latches SDI on rising edge
Device latches SDO on falling edge



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