MCP8026 datasheet(28/64 Pages) MICROCHIP

28 / 64 page

MCP8025/6

DS20005339B-page 28

 2016 Microchip Technology Inc.

The SMPS enters Pulse Frequency Modulation (PFM)

mode at light loads, improving efficiency at the expense

of higher output voltage ripple. The PFM circuitry

provides a means to disable the SMPS as well. If the

SMPS is not utilized in the application, connecting the

feedback pin (FB) to an external supply (2.5V to 5.5V)

will force the SMPS to a shutdown state.

The maximum inductor value for operation in

Discontinuous Conduction mode can be determined by

using Equation 4-1.

EQUATION 4-1:

LMAX SIMPLIFIED

Using the LMAX inductor value calculated using

Equation 4-1 will ensure Discontinuous Conduction

mode operation for output load currents below the

critical current level, IO(CRIT). For example, with an

output voltage of +5V, a standard inductor value of

4.7 µH will ensure Discontinuous Conduction mode

operation with an input voltage of 6V, a switching

frequency of 468 kHz and a critical load current of

150 mA.

The output voltage is set by using a resistor divider

network. The resistor divider is connected between the

inductor output and ground. The divider common point

is connected to the FB pin which is then compared to

an internal 1.25V reference voltage.

The buck regulator will set the BIOCPW bit in the

STAT0 register and send a STATUS_0 message to the

host whenever the input switching current exceeds

2.5A peak (typical). The bit will be cleared when the

peak input switching current drops back below the 2.5A

(typical) limit. This is a warning bit only, no action is

taken to shut down the buck operation. The overcurrent

limit will shorten the buck duty cycle and therefore limit

the maximum power out of the buck regulator.

The buck regulator will set the BUVLOW bit in the

STAT0 register and send a STATUS_0 message to the

host whenever the output voltage drops below 90% of

the rated output voltage. The bit will be cleared when

the output voltage returns to 94% of the rated value.

If the buck regulator output voltage falls below 80% of

rated output voltage, the device will shut down with a

Buck Undervoltage Lockout Fault. The BUVLOF bit in

the STAT0 register will be set and a STATUS_0

message will be sent to the host. The ILIMIT_OUT

signal will transition low to indicate the fault.

The Voltage Supervisor is designed to shut down the

buck regulator when VDD rises above AOVLOSTOP.

When shutting down the buck regulator is not

desirable, the user should add a voltage suppression

device to the VDD input in order to prevent VDD from

rising above AOVLOSTOP.

The Voltage Supervisor is also designed to shut down

the

buck

regulator

when

VDD falls below

UVLOBK_STOP.

The device will set the BUVLOF bit in the STAT0

when

the

buck

input

voltage

drops

below

UVLOBK_STOP.

Table 4-1 shows the faults that will disable the buck

regulator.

4.2.4

CHARGE PUMP

An unregulated charge pump is utilized to boost the

input to the +12V LDO during low input conditions.

When the input bias to the device (VDD) drops below

CPSTART, the charge pump is activated. When

activated, 2 x VDD is presented to the input of the

+12V LDO, which maintains a minimum of +10V at its

output.

The typical charge pump flying capacitor is a 0.1 µF to

1.0 µF ceramic capacitor.

4.2.5

SUPERVISOR

The bias generator incorporates a voltage supervisor

and a temperature supervisor.

4.2.5.1

Brownout – Configuration Lost

When the device first powers up or when VDD drops

below 3.8V, the brown-out reset warning flag bit

(BORW) in the STAT1 register will be set. The bit is only

a warning indicating that the contents of the configura-

tion registers may have been compromised by a low

supply voltage condition. The host processor should

send new configuration information to the device.

4.2.5.2

Voltage Supervisor

The voltage supervisor protects the device, the

external

power

MOSFETs

and

the

external

microcontroller from damage caused by overvoltage or

undervoltage of the input supply, VDD.

the

event

undervoltage

condition

(VDD < +5.5V) or an overvoltage condition of the

MCP8025 device (VDD > +20V), the motor drivers are

switched off. The bias generator, the communication

port and the remainder of the motor control unit remain

active. The failure state is flagged on the DE2 pin with

a status message. In extreme overvoltage conditions

(VDD > +32V), all functions are turned off.

In the event of a severe undervoltage condition

(VDD < +4.0V), the buck regulator will be disabled. If

the set point of the buck regulator output voltage is

above the buck undervoltage lockout value, the buck

output voltage will decrease as VDD decreases.

MAX

--------

–







OCRIT





----------------------------------------------



MCP8026 Datasheet(PDF) 28 Page - Microchip Technology

MCP8026 Datasheet(HTML) 28 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

Datasheet Download

Link URL