MCP8026 datasheet(14/64 Pages) MICROCHIP

14 / 64 page

MCP8025/6

DS20005339B-page 14

 2016 Microchip Technology Inc.

Back EMF Sampler Phase Multiplexer (MCP8025)

MUX[1:2] Input Pull Down

RPULLDN

—47

—



Transition Time

tTRAN

—

150

250

(Note 2)

Delay from MUX Select to ZC

Out

MUXDELAY

—

210

—

Phase Filter Capacitors

CPHASE

—

1.5

—

MUX input to ground

COMMUNICATION PORTS

Standard LIN (MCP8025)

Microcontroller Interface

TX Input Pull-Up Resistor

RPUTXD

—48

—



Pull up to 5V

Bus Interface

LIN Bus High-Level Input

Voltage

VHI

0.6 x

VDD

—

Recessive state

LIN Bus Low-Level Input

Voltage

VLO

——

0.4 x

VDD

Dominant state

LIN Bus Input Hysteresis

VHYS

——

0.175 x

VDD

VVHI –VLO

LIN Bus Low-Level Output

Current

IOL

7.3

—

VO =0.2 xVDD, VDD =8V

16.5

—

VO =0.2 xVDD, VDD = 18V

30.6

—

VO =0.251 x VDD, VDD =18V

LIN Bus Input Pull-Up Current

IPU

—

180

µA

LIN Bus Short-Circuit Current

Limit

ISC

—

200

LIN Bus Low-Level Output

Voltage

VOL

——

0.2 x

VDD

LIN Bus Input Leakage Current

(at receiver during dominant

bus level)

IBUS_PAS_DOM

-1

—

Driver OFF

VBUS =0V

VDD =12V

LIN Bus Input Leakage Current

(at receiver during recessive

bus level)

IBUS_PAS_REC

—

µA

Driver OFF

VBUS  VDD

7V < VBUS <19V

7V < VDD <19V

LIN Bus Input Leakage Current

(disconnected from ground)

IBUS_NO_GND

-1

—

GND = VDD =12V

0V < VBUS <19V

LIN Bus Input Leakage Current

(disconnected from VDD)

IBUS_NO_BAT

——

µA

VDD =0V

0V < VBUS <19V

Receiver Center Voltage

VBUS_CNT

0.475

xVDD

0.5 x

VDD

0.525 x

VDD

VVBUS _CNT =(VHI –VLO)/2

LIN Bus Slave Pull-Up

Resistance

RPULLUP



LIN Dominant State Timeout

tDOM_TOUT

—25

—

Propagation Delay

TRX_PD

—

3.0

6.0

µs

Propagation delay of receiver

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications:

Unless otherwise noted, TJ = -40°C to +150°C, typical values are for +25°C, VDD = 13V.

Parameters

Symbol

Min.

Typ.

Max.

Units

Conditions

Note 1:

1000 hour cumulative maximum for ROM data retention (typical).

Limits are by design, not production tested.

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