MCP8026 datasheet(48/64 Pages) MICROCHIP

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MCP8025/6

DS20005339B-page 48

 2016 Microchip Technology Inc.

5.0

APPLICATION INFORMATION

5.1

Component Calculations

5.1.1

CHARGE PUMP CAPACITORS

FIGURE 5-1:

Charge Pump.

Let:

5.1.1.1

Flying Capacitor

The flying capacitor should be chosen to charge to a

minimum of 95% (3

) of VDDH within one half of a

switching cycle.

Choose a 180 nF capacitor.

5.1.1.2

Charge Pump Output Capacitor

Solve for the charge pump output capacitance,

connected between V12P and ground, that will supply

the 20 mA load for one switch cycle. The +12V LDO

pin on the MCP8025/6 is the “V12P” pin referenced in

the calculations.

For stability reasons, the +12V LDO and +5V LDO

capacitors must be greater than 4.7 µF, so choose

 4.7 µF.

5.1.1.3

Charging Path (Flying Capacitor

across CAP1 and CAP2)

5.1.1.4

Transfer Path (Flying and Output

Capacitors)

5.1.1.5

Calculate the Flying Capacitor

Voltage Drop in One Cycle while

Supplying 20 mA

The second and subsequent transfer cycles will have

a higher voltage available for transfer, since the

capacitor is not completely depleted with each cycle.

VCAP will then be VCAP – dV after the first transfer,

plus VDDH –(VCAP – dV) times the RC constant. This

repeats for each subsequent cycle, allowing a larger

charge pump capacitor to be used if the system

tolerates several charge transfers before requiring

full-output voltage and current.

Repeating the steps in Section 5.1.1.3, Charging Path

(Flying Capacitor across CAP1 and CAP2) for the

second cycle (and subsequent by re-calculating for

each new value of VCAP after each transfer):

5.1.1.6

Charge Pump Results

The maximum charge pump flying capacitor value is

202 nF to maintain a 95% voltage transfer ratio on the

first charge pump cycle. Larger capacitor values may

be used but they will require more cycles to charge to

maximum voltage. The minimum required output

capacitor value is 2.65 µF to supply 20 mA for 13.3 µs

with a 100 mV drop. A larger output capacitor may be

used to cover losses due to capacitor tolerance over

temperature, capacitor dielectric and PCB losses.

IOUT =20 mA

fCP = 75 kHz (charge/discharge in one cycle)

50% duty cycle

VDDH = 6V (worst case)

RDSON =7.5 (RPMOS), 3.5 (RNMOS)

V12P = 2 x VDDH (ideal)

CESR =20 m (ceramic capacitors)

VDROP =100 mV (VOUT ripple)

TCHG =TDCHG = 0.5 x 1/75 kHz = 6.67 µs

 =TCHG

 =TCHG/3

RC = TCHG/3

C= TCHG/(R x 3)

C = 6.67 µs/([7.5

 +3.5 +0.02]x 3)

C = 202 nF

C= IOUT x dt/dV

C= IOUT x13.3 µs/(VDROP +IOUT xCESR)

C = 20 mA x 13.3 µs/(0.1V + 20 mA x 20 m

)

 2.65 µF

Transfer

Charge

VCAP =VDDH (1 – e-T/)

VCAP = 6V (1–e – [6.67 µs/([7.5 +3.5 +20 m] x 180 nF)])

VCAP = 5.79V available for transfer

V12P = VDDH +VCAP –IOUT x dt/C

V12P = 6V + 5.79V – (20 mA x 6.67 µs/180 nF)

V12P = 11.049V

dV = IOUT x dt/C

dV = 20 mA x 6.67 µs/180 nF

dV = 0.741V @ 20 mA

VCAP =(VCAP –dV) +(VDDH –(VCAP –dV)) (1 – e-T/)

VCAP = (5.79V – 0.741V) + (6V – (5.79V – 0.741V) x

(1–e – [6.67 µs/([7.5 +3.5 +20 m]x 180 nF)])

VCAP = 5.049V + 0.951V x 0.96535

VCAP = 5.967V available for transfer on second cycle

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