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LE25S161 Datasheet(PDF) 44 Page - ON Semiconductor |
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LE25S161 Datasheet(HTML) 44 Page - ON Semiconductor |
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44 / 54 page  LE25S161 www.onsemi.com 44 12. Power-on In order to protect against unintentional writing, CS must be within at VDD-0.3 to VDD+0.3 on power-on. After power-on, the supply voltage has stabilized at VDD (min) or higher, and waits for tVSL before CS is driven to "Low". The device is in the standby state after power is turned on. Figure 25. Power-on Timing Power-up timing Parameter Symbol spec unit min max VDD(Min) to CS Low tVSL 300 µs Time to Write Operation tPUW 100 500 µs Operation Inhibit Voltage VWI 1.0 1.5 V VDD(Max) VDD(Min) VDD 0V tPUW Chip Select (CS="L") is Not Allowed Full Access Allowed Reset State tVSL VWI Program, Erase and Write Commands are Ignored Read Command is allowed time |
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