TMS320DM642 datasheet(75/178 Pages) TI

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5.3.2

Power-Supply Design Considerations

DVDD

CVDD

VSS

C6000

DSP

Schottky

Diode

I/O Supply

Core Supply

GND

5.3.3

Power-Supply Decoupling

5.3.4

Peripheral Power-Down Operation

TMS320DM642

Video/Imaging Fixed-Point Digital Signal Processor

SPRS200J – JULY 2002 – REVISED AUGUST 2005

A dual-power supply with simultaneous sequencing can be used to eliminate the delay between core and

I/O power up. A Schottky diode can also be used to tie the core rail to the I/O rail (see Figure 5-5).

Figure 5-5. Schottky Diode Diagram

Core and I/O supply voltage regulators should be located close to the DSP (or DSP array) to minimize

inductance and resistance in the power delivery path. Additionally, when designing for high-performance

applications utilizing the C6000™ platform of DSPs, the PC board should include separate power planes

for core, I/O, and ground, all bypassed with high-quality low-ESL/ESR capacitors.

In order to properly decouple the supply planes from system noise, place as many capacitors (caps) as

possible close to the DSP. Assuming 0603 caps, the user should be able to fit a total of 60 caps, 30 for

the core supply and 30 for the I/O supply. These caps need to be close to the DSP power pins, no more

than 1.25 cm maximum distance to be effective. Physically smaller caps, such as 0402, are better

because of their lower parasitic inductance. Proper capacitance values are also important. Small bypass

caps (near 560 pF) should be closest to the power pins. Medium bypass caps (220 nF or as large as can

be obtained in a small package) should be next closest. TI recommends no less than 8 small and

8 medium caps per supply (32 total) be placed immediately next to the BGA vias, using the "interior" BGA

space and at least the corners of the "exterior".

Eight larger caps (4 for each supply) can be placed further away for bulk decoupling. Large bulk caps (on

the order of 100 µF) should be furthest away (but still as close as possible). No less than 4 large caps per

supply (8 total) should be placed outside of the BGA.

Any cap selection needs to be evaluated from a yield/manufacturing point-of-view. As with the selection of

any component, verification of capacitor availability over the product’s production lifetime should be

considered.

The DM642 device can be powered down in three ways:

• Power-down due to pin configuration

• Power-down due to software configuration – relates to the default state of the peripheral configuration

bits in the PERCFG register.

• Power-down during run-time via software configuration

On the DM642 device, the HPI, PCI, and EMAC and MDIO peripherals are controlled (selected) at the pin

level during chip reset (e.g., PCI_EN, HD5, and MAC_EN pins).

DM642 Peripheral Information and Electrical Specifications

TMS320DM642 Datasheet(PDF) 75 Page - Texas Instruments

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