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TMS320DM642 Datasheet(PDF) 23 Page - Texas Instruments |
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TMS320DM642 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 178 page ![]() www.ti.com HHWIL/PTRDY HCNTL0/PSTOP HCNTL1/PDEVSEL Data Register Select Half-Word Select Control HPI (A) (Host-Port Interface) 32 HD[15:0]/AD[15:0] HAS/PPAR HR/W/PCBE2 HCS/PPERR HDS1/PSERR HDS2/PCBE1 HRDY/PIRDY HINT/PFRAME (HPI16 ONLY) HD[15:0]/AD[15:0] HR/W/PCBE2 HDS2/PCBE1 PCBE0 GP0[12]/PGNT GP0[11]/PREQ GP0[14]/PCLK HINT/PFRAME GP0[13]/PINTA Data/Address Arbitration 32 Clock Control PCI Interface (B) HAS/PPAR GP0[15]/PRST HRDY/PIRDY HCNTL0/PSTOP HHWIL/PTRDY GP0[10]/PCBE3 GP0[9]/PIDSEL HCNTL1/PDEVSEL HDS1/PSERR Error Command Byte Enable Serial EEPROM XSP_DO/MDIO XSP_CS XSP_CLK/MDCLK XSP_DI HCS/PPERR HD[31:16]/AD[31:16](C) HD[31:16]/AD[31:16](C) TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 A. These HPI pins are muxed with the PCI peripheral. By default, these signals function as HPI. For more details on these muxed pins, see the Device Configurations section of this data sheet. B. These PCI pins (excluding PCBE0 and XSP_CS) are muxed with the HPI or MDIO or GP0 peripherals. By default, these signals function as HPI and no function, respectively. For more details on these muxed pins, see the Device Configurations section of this data sheet. C. These HPI/PCI data pins (HD[31:16/AD[31:16]) are muxed with the EMAC peripheral. By default, these pins function as HPI. For more details on the EMAC pin functions, see the Ethernet MAC (EMAC) peripheral signals section and the terminal functions table portions of this data sheet. Figure 2-9. HPI/PCI Peripheral Signals Device Overview 23 |
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