MCP37231 datasheet(52/144 Pages) MICROCHIP

52 / 144 page

MCP37231/21-200 AND MCP37D31/21-200

DS20005322D-page 52

 2014-2016 Microchip Technology Inc.

TABLE 4-7:

RECOMMENDED PLL CHARGE PUMP AND LOOP FILTER BIT SETTINGS

PLL Charge Pump and Loop Filter

Parameter

fQ =fREF/PLL_REFDIV

fQ<5 MHz

5 MHz ≤ fQ <25 MHz

fQ ≥ 25 MHz

PLL_CHAGPUMP<3:0>

0x04

PLL_RES<4:0>

0x1F

0x07

PLL_CAP3<4:0>

0x07

0x02

0x07

PLL_CAP2<4:0>

0x07

0x01

0x08

PLL_CAP1<4:0>

0x07

0x01

0x08

TABLE 4-8:

EXAMPLE OF PLL CONTROL BIT SETTINGS FOR fS = 200 MHz WITH fREF = 100 MHz

PLL Control Parameter

Value

Descriptions

fREF

100 MHZ

fREF is coming from the external clock input

Target fS(1)

200 MHZ

ADC sampling frequency

Target fVCO(2)

1.2 GHZ

Range of fVCO = 1.0375 GHz – 1.325 GHz

Target fQ(3)

10 MHZ

fQ = fREF/PLL_REFDIV (See Table 4-7)

PLL Reference Divider (R)

PLL_REFDIV<9:0> = 0x0A

PLL Prescaler (N)

120

PLL_PRE<11:0> = 0x78

PLL Output Divider

PLL_OUTDIV<3:0> = 0x06

Note 1:

fS =fVCO/PLL_OUTDIV = 1.2 GHz/6 = 200 MHz

fVCO = (N/R) x fREF = (12) x 100 MHz = 1.2 GHz

fQ should be maximized for the best noise performance.

MCP37231 Datasheet(PDF) 52 Page - Microchip Technology

MCP37231 Datasheet(HTML) 52 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL