STV2050A datasheet(15/83 Pages) STMICROELECTRONICS

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STV2050A - SLAVE I²C BUS INTERFACE

3 SLAVE I²C BUS INTERFACE

3.1 FEATURES

The I²C interface is controlled by 4 pins:

3.1.1 ADS0: IC Address and PLL Mode

The level at this pin corresponds to bit 1 in the first byte in bus transmissions.

– If ADS0 is connected to GND, the analog outputs will be automatically switched on after the

reset sequence, and once the internal PLL is activated.

– If the pin is connected to VCC, the DACs will remain in high impedance. The internal PLL is

inhibited, and the IC must use an external PLL.

3.1.2 SCLS Bus Clock

The polarity and timing for this pin comply with I²C Bus specifications.

3.1.3 SDAI Bus Data Input

The polarity and timing for this pin comply with I²C Bus specifications.

3.1.4 SDAO Bus Data Output

The polarity reversal and timing for this pin comply with I²C Bus specifications.

Abbreviations used:

Start condition

Stop condition

Device address

Device address for read

Device address for write

Sub-address

D0, D1,... Dn

Data bytes

The slave accepts the following DA subaddresses depending on the hardware configuration

defined on pin ADS0.

For the 00 to CF address range (RAM), an autoincrement function can be enabled using the

AIE (Auto Increment Enable) bit in the E7 register.

ADS0

0 (grounded, internal PLL only) DR = 39, DW = 38

1 (3.3 Volt, external PLL only) DR = 3B, DW = 3A

AIE

0 = Autoincrement disabled

1 = Autoincrement enabled

STV2050A Datasheet(PDF) 15 Page - STMicroelectronics