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R5F11BLE Datasheet(PDF) 74 Page - Renesas Technology Corp |
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R5F11BLE Datasheet(HTML) 74 Page - Renesas Technology Corp |
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74 / 143 page ![]() RL78/G1F 2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85°C) R01DS0246EJ0110 Rev. 1.10 Page 74 of 140 Aug 12, 2016 2.6.6 POR circuit characteristics Note 1. However, when the operating voltage falls while the LVD is off, enter STOP mode, or enable the reset status using the external reset pin before the voltage falls below the operating voltage range shown in 2.4 AC Characteristics. Note 2. Minimum time required for a POR reset when VDD exceeds below VPDR. This is also the minimum time required for a POR reset from when VDD exceeds below 0.7 V to when VDD exceeds VPOR while STOP mode is entered or the main system clock is stopped through setting bit 0 (HIOSTOP) and bit 7 (MSTOP) in the clock operation status control register (CSC). (TA = -40 to +85°C, VSS = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Power on/down reset threshold VPOR Voltage threshold on VDD rising 1.47 1.51 1.55 V VPDR Voltage threshold on VDD falling Note 1 1.46 1.50 1.54 V Minimum pulse width Note 2 TPW 300 μs TPW VPOR VPDR or 0.7 V Supply voltage (VDD) |
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