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REF2125 Datasheet(PDF) 20 Page - Texas Instruments |
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REF2125 Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 24 page ![]() 1 5 2 3 4 EN IN CS GND OUT REF21XX R C C 20 REF2125 SBAS798 – SEPTEMBER 2017 www.ti.com Product Folder Links: REF2125 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 11 Layout 11.1 Layout Guidelines Figure 31 illustrates an example of a PCB layout for a data acquisition system using the REF2125. Some key considerations are: • Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN, VREF of the REF2125. • Decouple other active devices in the system per the device specifications. • Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup. • Place the external components as close to the device as possible. This configuration prevents parasitic errors (such as the Seebeck effect) from occurring. • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary. 11.2 Layout Example Figure 31. Layout Example |
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