HD74AC datasheet(11/52 Pages) HITACHI

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FACT Descriptions and Family Characteristics

2. Circuit Characteristics

2.1 Power Dissipation

One advantage to using CMOS logic is its extremely low power consumption. During quiescent

conditions, FACT will consume several orders of magnitude less current than its bipolar counterparts. But

DC power consumption is not the whole picture. Any circuit will have AC power consumption, whether it

is built with CMOS or bipolar technologies.

Power consumption of a circuit can be calculated using the formula:

D = [(CL + CPD) • VCC • VS • f] + [IQ • VCC]

where:

D = power dissipation

L = load capacitance

PD = device power capacitance

CC = power supply

S = output voltage swing

f = frequency of operation

Q = quiescent current

Power consumption for FACT is dependent on the supply voltage, frequency of operation, internal

capacitance and load. V

S will be VCC and IQ can be considered negligible for CMOS. Therefore, the

simplified formula for CMOS is:

D = (CL + CPD)VCC

2 f

PD values for CMOS devices are calculated by measuring the power consumption of a device at two

different frequencies. C

PD is calculated in the following manner.

1. The power supply voltage is set to V

CC = 5.0 VDC.

2. Signal inputs are set up so that as many outputs as possible are switching, giving a worst-case

situation per JEDEC C

PD conditions.

HD74AC Datasheet(PDF) 11 Page - Hitachi Semiconductor