TMS320VC5471GHKA datasheet(86/97 Pages) TI

86 / 97 page

Electrical Specifications

June 2001 – Revised December 2002

SPRS180C

Table 6–31. I2C Bus Device Timing Requirements (STOP and START Conditions)

STANDARD

MODE

FAST

MODE

UNIT

MIN

MAX

MIN

MAX

UNIT

th(SDAL–SCLL1)

Hold time, SCL low from SDA low (START condition)

0.6

µs

tsu(SCLH-SDAH)

Setup time, SDA high from SCL high (STOP condition)

0.6

µs

tw(SDAH)

Pulse duration, SDA high. Bus free time between a STOP and START

condition.

4.7

1.3

µs

SCL

SDA

tw(SDAH)

th(SDAL–SCLL1)

tsu(SCLH–SDAH)

Figure 6–31. I2C Bus Timings (STOP and START Conditions)

Table 6–32. I2C Bus Device Timing Requirements (Repeated START Condition)

STANDARD

MODE

FAST

MODE

UNIT

MIN

MAX

MIN

MAX

UNIT

tsu(SCLH–SDAL)

Setup time, SDA low after SCL high

4.7

0.6

µs

td(SDAL–SCLL2)

Hold time, SCL low after SDA low

0.6

µs

SCL

SDA

tsu(SCLH–SDAL)

Repeated

Start

th(SDAL–SCLL2)

Figure 6–32. I2C Bus Timings (Repeated START Condition)

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